feat(espefuse): Update the way to complete the operation

peterdragun · Jul 16, 2024 · c147694 · c147694
1 parent 328832d
commit c147694
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Showing 18 changed files with 90 additions and 54 deletions.
diff --git a/espefuse/efuse/esp32c2/emulate_efuse_controller.py b/espefuse/efuse/esp32c2/emulate_efuse_controller.py
@@ -24,7 +24,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -55,10 +55,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32c2/fields.py b/espefuse/efuse/esp32c2/fields.py
@@ -152,9 +152,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32c3/emulate_efuse_controller.py b/espefuse/efuse/esp32c3/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32c3/fields.py b/espefuse/efuse/esp32c3/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32c6/emulate_efuse_controller.py b/espefuse/efuse/esp32c6/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32c6/fields.py b/espefuse/efuse/esp32c6/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32h2/emulate_efuse_controller.py b/espefuse/efuse/esp32h2/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32h2/fields.py b/espefuse/efuse/esp32h2/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32h2beta1/emulate_efuse_controller.py b/espefuse/efuse/esp32h2beta1/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32h2beta1/fields.py b/espefuse/efuse/esp32h2beta1/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32p4/emulate_efuse_controller.py b/espefuse/efuse/esp32p4/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32p4/fields.py b/espefuse/efuse/esp32p4/fields.py
@@ -161,9 +161,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.REGS.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32s2/emulate_efuse_controller.py b/espefuse/efuse/esp32s2/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32s2/fields.py b/espefuse/efuse/esp32s2/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32s3/emulate_efuse_controller.py b/espefuse/efuse/esp32s3/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32s3/fields.py b/espefuse/efuse/esp32s3/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )

diff --git a/espefuse/efuse/esp32s3beta2/emulate_efuse_controller.py b/espefuse/efuse/esp32s3beta2/emulate_efuse_controller.py
@@ -22,7 +22,7 @@ def __init__(self, efuse_file=None, debug=False):
         self.Fields = EfuseDefineFields()
         self.REGS = EfuseDefineRegisters
         super(EmulateEfuseController, self).__init__(efuse_file, debug)
-        self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
 
     """ esptool method start >>"""
 
@@ -53,10 +53,10 @@ def handle_writing_event(self, addr, value):
                 self.clean_blocks_wr_regs()
                 self.check_rd_protection_area()
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
             elif value == self.REGS.EFUSE_READ_CMD:
                 self.write_reg(addr, 0)
-                self.write_reg(self.REGS.EFUSE_STATUS_REG, 1)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
                 self.save_to_file()
 
     def get_bitlen_of_block(self, blk, wr=False):

diff --git a/espefuse/efuse/esp32s3beta2/fields.py b/espefuse/efuse/esp32s3beta2/fields.py
@@ -160,9 +160,13 @@ def clear_pgm_registers(self):
     def wait_efuse_idle(self):
         deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
         while time.time() < deadline:
-            # if self.read_reg(self.EFUSE_CMD_REG) == 0:
-            if self.read_reg(self.REGS.EFUSE_STATUS_REG) & 0x7 == 1:
-                return
+            cmds = self.REGS.EFUSE_PGM_CMD | self.REGS.EFUSE_READ_CMD
+            if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                if self.read_reg(self.REGS.EFUSE_CMD_REG) & cmds == 0:
+                    # Due to a hardware error, we have to read READ_CMD again
+                    # to make sure the efuse clock is normal.
+                    # For PGM_CMD it is not necessary.
+                    return
         raise esptool.FatalError(
             "Timed out waiting for Efuse controller command to complete"
         )