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This PR adds another opgroup
SHFL
for SIMD shuffling instructionsOperations
Currently only two operations are supported:
SHUFFLE
: Shuffle the input vector inoperand_i[0]
with the mask inoperand_i[1]
SHUFFLE2
: Shuffle the input vectors inoperand_i[0]
andoperand_i[2]
with the mask inoperand_i[1]
The
SHUFFLE2
operation is selected by setting theop_mod_i
flag.Verification
The unit was integrated and tested in the snitch cluster for all SIMD formats (FP8, FP16, FP32).
Evaluation
Synthesis results of the snitch cluster showed an overhead of ~3kGE/FPU with all formats enabled. The critical path is not affected, even if no pipeline registers are configured.