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Releases: pulp-platform/cvfpu

pulp-v0.2.3

27 Sep 09:53
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  • Fix illegal Verilog assignment in DivSqrt unit

pulp-v0.2.2

26 Jun 10:28
de4f932
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  • Add FP16ALT support to THMULTI DivSqrt

pulp-v0.2.1

07 Jun 12:44
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  • Fix synchronization of THMULTI DivSqrt lanes when FP16ALT, FP8, or FPALT are enabled.

pulp-v0.2.0

03 Jun 10:42
988d7e0
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  • Add new multi-format DivSqrt unit from openC910. The operation group block leveraging this module supports FP64, FP32, FP16 and SIMD operations
  • Replace the PulpDivsqrt top-level parameter with the new DivSqrtSel parameter choosing among the three supported DivSqrt units. The default value THMULTI selects the newly added DivSqrt unit from openC910

pulp-v0.1.3

19 Jul 15:42
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  • Fix lane_valid generation for SIMD CAST involving the largest precision available
  • Tie some potentially unused (depending on the FPU configuration) bits in opgroup_multifmt_slice to zero

pulp-v0.1.2

12 Jun 15:06
92128e6
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  • Fix synchronization scheme for SIMD DivSqrt

pulp-v0.1.1

05 May 17:37
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  • Fix various tool compatibility issues

pulp-v0.1.0

04 May 16:46
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  • Add low and mixed-precision SDOTP with support for stochastic rounding
  • Add FP8alt (1,4,3) format
  • Add support for compressed vector compare results (one bit per comparison in the LSBs)