Releases: pulp-platform/cvfpu
Releases · pulp-platform/cvfpu
pulp-v0.2.3
- Fix illegal Verilog assignment in DivSqrt unit
pulp-v0.2.2
- Add
FP16ALT
support toTHMULTI
DivSqrt
pulp-v0.2.1
- Fix synchronization of
THMULTI
DivSqrt lanes whenFP16ALT
,FP8
, orFPALT
are enabled.
pulp-v0.2.0
- Add new multi-format DivSqrt unit from openC910. The operation group block leveraging this module supports FP64, FP32, FP16 and SIMD operations
- Replace the
PulpDivsqrt
top-level parameter with the newDivSqrtSel
parameter choosing among the three supported DivSqrt units. The default valueTHMULTI
selects the newly added DivSqrt unit from openC910
pulp-v0.1.3
- Fix
lane_valid
generation for SIMD CAST involving the largest precision available - Tie some potentially unused (depending on the FPU configuration) bits in
opgroup_multifmt_slice
to zero
pulp-v0.1.2
- Fix synchronization scheme for SIMD DivSqrt
pulp-v0.1.1
- Fix various tool compatibility issues
pulp-v0.1.0
- Add low and mixed-precision
SDOTP
with support for stochastic rounding - Add
FP8alt (1,4,3)
format - Add support for compressed vector compare results (one bit per comparison in the LSBs)