Data Generation #1908

Job	Run time
riscv-isa-sim	7s
tc-gcc	34s
tc-llvm	55s
check-control-registers	24s
check-opcodes	4s
verilator	11s
verilator-model (minpool)	11s
verilator-model (mempool)	13s
build-apps-gcc (minpool)	51s
build-apps-gcc (mempool)	41s
check-bootrom	12s
unit-test	2m 20s
tc-halide	11s
build-apps-llvm (minpool)	1m 24s
build-apps-llvm (mempool)	1m 22s
build-apps-halide (minpool)	1m 23s
build-apps-halide (mempool)	1m 21s
run-apps-gcc	0s
run-apps-llvm	0s
run-apps-halide (minpool)	41s
run-apps-halide (mempool)	3m 6s
clean-up	3s
clean-up-compile-runs (minpool)	3s
clean-up-compile-runs (mempool)	3s
	16m 20s

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