Data Generation #1920

Job	Run time
riscv-isa-sim	9s
tc-gcc	24s
tc-llvm	49s
check-control-registers	26s
check-opcodes	4s
verilator	6s
verilator-model (minpool)	5s
verilator-model (mempool)	23s
check-bootrom	9s
build-apps-gcc (minpool)	54s
build-apps-gcc (mempool)	1m 13s
unit-test	1m 59s
tc-halide	8s
build-apps-llvm (minpool)	2m 1s
build-apps-llvm (mempool)	1m 11s
build-apps-halide (minpool)	47s
build-apps-halide (mempool)	44s
run-apps-gcc	0s
run-apps-halide (minpool)	44s
run-apps-halide (mempool)	3m 8s
run-apps-llvm (minpool)	39s
run-apps-llvm (mempool)	2m 50s
clean-up	3s
clean-up-compile-runs (minpool)	2s
clean-up-compile-runs (mempool)	2s
	19m 0s

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