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HVS Core Clock Request Fix #4402

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Commits on Jun 21, 2021

  1. Revert "drm/vc4: Increase the core clock based on HVS load"

    This reverts commit 1c38342.
    mripard committed Jun 21, 2021
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Commits on Jun 23, 2021

  1. Revert "drm: Introduce new state accessors in place of drm_atomic_get…

    …_crtc_state"
    
    This reverts commit 040d0dd.
    mripard committed Jun 23, 2021
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  2. drm/vc4: crtc: Add encoder to vc4_crtc_config_pv prototype

    vc4_crtc_config_pv() retrieves the encoder again, even though its only
    caller, vc4_crtc_atomic_enable(), already did.
    
    Pass the encoder pointer as an argument instead of going through all the
    connectors to retrieve it again.
    
    Signed-off-by: Maxime Ripard <[email protected]>
    mripard committed Jun 23, 2021
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  3. drm/vc4: crtc: Rework the encoder retrieval code (again)

    It turns out the encoder retrieval code, in addition to being
    unnecessarily complicated, has a bug when only the planes and crtcs are
    affected by a given atomic commit.
    
    Indeed, in such a case, either drm_atomic_get_old_connector_state or
    drm_atomic_get_new_connector_state will return NULL and thus our encoder
    retrieval code will not match on anything.
    
    We can however simplify the code by using drm_for_each_encoder_mask, the
    drm_crtc_state storing the encoders a given CRTC is connected to
    directly and without relying on any other state.
    
    Signed-off-by: Maxime Ripard <[email protected]>
    mripard committed Jun 23, 2021
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  4. drm/vc4: crtc: Add some logging

    The encoder retrieval code has been a source of bugs and glitches in the
    past and the crtc <-> encoder association been wrong in a number of
    different ways.
    
    Add some logging to quickly spot issues if they occur.
    
    Signed-off-by: Maxime Ripard <[email protected]>
    mripard committed Jun 23, 2021
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  5. drm/vc4: Leverage the load tracker on the BCM2711

    The load tracker was initially designed to report and warn about a load
    too high for the HVS. To do so, it computes for each plane the impact
    it's going to have on the HVS, and will warn (if it's enabled) if we go
    over what the hardware can process.
    
    While the limits being used are a bit irrelevant to the BCM2711, the
    algorithm to compute the HVS load will be one component used in order to
    compute the core clock rate on the BCM2711.
    
    Let's remove the hooks to prevent the load tracker to do its
    computation, but since we don't have the same limits, don't check them
    against them, and prevent the debugfs file to enable it from being
    created.
    
    Signed-off-by: Maxime Ripard <[email protected]>
    mripard committed Jun 23, 2021
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  6. drm/vc4: Increase the core clock based on HVS load

    Depending on a given HVS output (HVS to PixelValves) and input (planes
    attached to a channel) load, the HVS needs for the core clock to be
    raised above its boot time default.
    
    Failing to do so will result in a vblank timeout and a stalled display
    pipeline.
    
    Signed-off-by: Maxime Ripard <[email protected]>
    mripard committed Jun 23, 2021
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