oops

src/rp2_common/hardware_clocks/clocks.c

@@ -346,7 +346,7 @@ void set_sys_clock_48mhz(void) {
 #ifndef PICO_CLOCK_ADJUST_PERI_CLOCK_WITH_SYS_CLOCK
 // support old incorrect spelling too
 #ifdef PICO_CLOCK_AJDUST_PERI_CLOCK_WITH_SYS_CLOCK
-#define PICO_CLOCK_ADJUST_PERI_CLOCK_WITH_SYS_CLOCK PICO_CLOCK_ADJUST_PERI_CLOCK_WITH_SYS_CLOCK
+#define PICO_CLOCK_ADJUST_PERI_CLOCK_WITH_SYS_CLOCK PICO_CLOCK_AJDUST_PERI_CLOCK_WITH_SYS_CLOCK
 #else
 // By default, when reconfiguring the system clock PLL settings after runtime initialization,
 // the peripheral clock is switched to the 48MHz USB clock to ensure continuity of peripheral operation.

test/kitchen_sink/kitchen_sink.c

@@ -167,6 +167,35 @@ float __attribute__((noinline)) foox(float x, float b) {
     return x * b;
 }
 
+#include "boot/picoboot_constants.h"
+
+void flarp(uint z) {
+    uint a, b;
+    pico_default_asm_volatile(
+            ".p2align 2\n"
+            "nop\n"
+            "ldr %[a], [%[tic]]\n"
+            ".p2align 2\n"
+            "cbz %[z], 1f\n"
+            "nop\n"
+            "1:\n"
+            "ldr %[b], [%[tic]]\n"
+    : [a] "=&l" (a), [b] "=&l" (b)
+    : [tic] "l" (0xE000E018), [z] "l" (z)
+    );
+    printf("%d %d %d %d\n", z, a, b, b-a);
+}
+
+struct spam {
+    uint a,b;
+};
+
+struct spam __noinline fip(void) {
+    struct spam x;
+    x.a = 3;
+    x.b = 7;
+    return x;
+}
 
 int main(void) {
     spiggle();
@@ -193,6 +222,41 @@ int main(void) {
     hard_assert(recursive_mutex_try_enter(&recursive_mutex, NULL));
     hard_assert(recursive_mutex_try_enter(&recursive_mutex, NULL));
     printf("%f\n", foox(1.3f, 2.6f));
+//    rom_reboot(REBOOT2_FLAG_REBOOT_TYPE_BOOTSEL, 100, BOOTSEL_FLAG_GPIO_PIN_SPECIFIED, 33);
+//    reset_usb_boot(1, 0);
+
+    *(uint32_t *)0xE000E010=4;          // count processor clock cycles, no interrupt
+    *(uint32_t *)0xE000E014=0xffffffff;
+    *(uint32_t *)0xE000E018=0xffffffff;
+    *(uint32_t *)0xE000E010=5;          // start SysTick counting processor clocks
+
+    flarp(0);
+    flarp(1);
+    flarp(0);
+    flarp(1);
+
+    mpu_hw->rnr = 0xffffffff;
+    printf("%08x\n", (int)mpu_hw->rnr);
+    mpu_hw->rbar = 0xffffffff;
+    printf("%08x\n", (int)mpu_hw->rbar);
+    mpu_hw->rlar = 0xffffffff;
+    printf("%08x\n", (int)mpu_hw->rlar);
+    *(io_rw_32 *)(PPB_BASE + M33_MPU_RBAR_A1_OFFSET) = 0xffffffff;
+    printf("%08x\n", (int)*(io_rw_32 *)(PPB_BASE + M33_MPU_RBAR_A1_OFFSET));
+    *(io_rw_32 *)(PPB_BASE + M33_MPU_RLAR_A1_OFFSET) = 0xffffffff;
+    printf("%08x\n", (int)*(io_rw_32 *)(PPB_BASE + M33_MPU_RLAR_A1_OFFSET));
+    // memset((void *)0x20000000, 3, 0x1234);
+    // while(true);
+    // printf("%08x\n", rp2350_chip_version());
+    // reset_usb_boot(1, 0);
+    // rom_reboot((REBOOT2_FLAG_REBOOT_TYPE_PC_SP) , 100, 0x200004, 0x20082000);
+    // rom_reboot((REBOOT2_FLAG_REBOOT_TYPE_NORMAL) , 100, 0x20000001, 0xaaaaaaaa);
+    // rom_reboot((REBOOT2_FLAG_NO_RETURN_ON_SUCCESS | REBOOT2_FLAG_REBOOT_TYPE_PC_SP) + 1 , 100, 0x20000001, 0xaaaaaaaa);
+    rom_reboot((REBOOT2_FLAG_NO_RETURN_ON_SUCCESS | REBOOT2_FLAG_REBOOT_TYPE_BOOTSEL | REBOOT2_FLAG_REBOOT_TO_RISCV), 100, 0, 0);
+//    rom_reboot((REBOOT2_FLAG_NO_RETURN_ON_SUCCESS | REBOOT2_FLAG_REBOOT_TYPE_PC_SP) , 100, 0x20000001, 0xaaaaaaaa);
+    struct spam foo = fip();
+    printf("%d\n", foo.b);
+    while(true);
 #ifndef __riscv
     // this should compile as we are Cortex M0+
     pico_default_asm ("SVC #3");