Changes for supporting some PHY Diagnostics (opencomputeproject#1527)

This change includes support for reading the following PHY layer diagnostics in SAI - Per PMD Lane Rx Signal Detect Per PMD Lane Rx Lock Status (aka CDR status) PCS Rx Link Status Per FEC Lane Alignment Marker Lock
richardyu-ms · Aug 4, 2022 · e47b9e0 · e47b9e0
1 parent 769dbfa
commit e47b9e0
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diff --git a/inc/saiport.h b/inc/saiport.h
@@ -2104,6 +2104,38 @@ typedef enum _sai_port_attr_t
      */
     SAI_PORT_ATTR_SUPPORTED_LINK_TRAINING_MODE,
 
+    /**
+     * @brief List of port's PMD lanes rx signal detect
+     *
+     * @type sai_port_lane_latch_status_list_t
+     * @flags READ_ONLY
+     */
+    SAI_PORT_ATTR_RX_SIGNAL_DETECT,
+
+    /**
+     * @brief List of port's PMD lanes rx lock status
+     *
+     * @type sai_port_lane_latch_status_list_t
+     * @flags READ_ONLY
+     */
+    SAI_PORT_ATTR_RX_LOCK_STATUS,
+
+    /**
+     * @brief Port's PCS RX Link Status
+     *
+     * @type sai_latch_status_t
+     * @flags READ_ONLY
+     */
+    SAI_PORT_ATTR_PCS_RX_LINK_STATUS,
+
+    /**
+     * @brief List of port's FEC lanes alignment marker lock
+     *
+     * @type sai_port_lane_latch_status_list_t
+     * @flags READ_ONLY
+     */
+    SAI_PORT_ATTR_FEC_ALIGNMENT_LOCK,
+
     /**
      * @brief End of attributes
      */

diff --git a/inc/saitypes.h b/inc/saitypes.h
@@ -441,6 +441,27 @@ typedef struct _sai_prbs_rx_state_t
     uint32_t error_count;
 } sai_prbs_rx_state_t;
 
+typedef struct _sai_latch_status_t
+{
+    /** Current status at the time of read */
+    bool current_status;
+
+    /** Indicates that the status changed at least once since the last read */
+    bool changed;
+} sai_latch_status_t;
+
+typedef struct _sai_port_lane_latch_status_t
+{
+    uint32_t lane;
+    sai_latch_status_t value;
+} sai_port_lane_latch_status_t;
+
+typedef struct _sai_port_lane_latch_status_list_t
+{
+    uint32_t count;
+    sai_port_lane_latch_status_t *list;
+} sai_port_lane_latch_status_list_t;
+
 /**
  * @brief Field match mask
  *
@@ -1308,6 +1329,12 @@ typedef union _sai_attribute_value_t
 
     /** @validonly meta->attrvaluetype == SAI_ATTR_VALUE_TYPE_PORT_ERR_STATUS_LIST */
     sai_port_err_status_list_t porterror;
+
+    /** @validonly meta->attrvaluetype == SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST */
+    sai_port_lane_latch_status_list_t portlanelatchstatuslist;
+
+    /** @validonly meta->attrvaluetype == SAI_ATTR_VALUE_TYPE_LATCH_STATUS */
+    sai_latch_status_t latchstatus;
 } sai_attribute_value_t;
 
 /**

diff --git a/meta/acronyms.txt b/meta/acronyms.txt
@@ -94,9 +94,11 @@ P4RT - Programming Protocol-independent Packet Processors Runtime
 PAM4 - Pulse Amplitude Modulation 4-level
 PBS - Peak Burst Size
 PCI - Peripheral Component Interconnect
+PCS - Physical Coding Sublayer
 PFC - Priority Flow Control
 PHP - Penultimate Hop Pop
 PIR - Peak Information Rate
+PMD - Physical Medium Dependent
 PN - Packet Number
 PRBS - Pseudorandom binary sequence
 PSC - PHB Scheduling Class

diff --git a/meta/saimetadatatypes.h b/meta/saimetadatatypes.h
@@ -451,6 +451,15 @@ typedef enum _sai_attr_value_type_t
      */
     SAI_ATTR_VALUE_TYPE_AUTH_KEY,
 
+    /**
+     * @brief Attribute value is a latch's status.
+     */
+    SAI_ATTR_VALUE_TYPE_LATCH_STATUS,
+
+    /**
+     * @brief Attribute value is a list of latch status for all lanes in a port.
+     */
+    SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST,
 } sai_attr_value_type_t;
 
 /**

diff --git a/meta/saisanitycheck.c b/meta/saisanitycheck.c
@@ -666,6 +666,8 @@ void check_attr_object_type_provided(
         case SAI_ATTR_VALUE_TYPE_SEGMENT_LIST:
         case SAI_ATTR_VALUE_TYPE_IP_ADDRESS_LIST:
         case SAI_ATTR_VALUE_TYPE_PORT_EYE_VALUES_LIST:
+        case SAI_ATTR_VALUE_TYPE_LATCH_STATUS:
+        case SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST:
         case SAI_ATTR_VALUE_TYPE_TIMESPEC:
 
         case SAI_ATTR_VALUE_TYPE_ACL_FIELD_DATA_BOOL:
@@ -964,6 +966,7 @@ void check_attr_default_required(
         case SAI_ATTR_VALUE_TYPE_MAP_LIST:
         case SAI_ATTR_VALUE_TYPE_IP_ADDRESS_LIST:
         case SAI_ATTR_VALUE_TYPE_PORT_EYE_VALUES_LIST:
+        case SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST:
         case SAI_ATTR_VALUE_TYPE_SYSTEM_PORT_CONFIG_LIST:
 
             if (((md->objecttype == SAI_OBJECT_TYPE_PORT) || (md->objecttype == SAI_OBJECT_TYPE_PORT_SERDES))
@@ -1167,6 +1170,7 @@ void check_attr_default_value_type(
                 case SAI_ATTR_VALUE_TYPE_MAP_LIST:
                 case SAI_ATTR_VALUE_TYPE_IP_ADDRESS_LIST:
                 case SAI_ATTR_VALUE_TYPE_PORT_EYE_VALUES_LIST:
+                case SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST:
                 case SAI_ATTR_VALUE_TYPE_SYSTEM_PORT_CONFIG_LIST:
                     break;
 
@@ -1766,6 +1770,7 @@ void check_attr_allow_flags(
             case SAI_ATTR_VALUE_TYPE_SEGMENT_LIST:
             case SAI_ATTR_VALUE_TYPE_IP_ADDRESS_LIST:
             case SAI_ATTR_VALUE_TYPE_PORT_EYE_VALUES_LIST:
+            case SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST:
             case SAI_ATTR_VALUE_TYPE_ACL_FIELD_DATA_UINT8_LIST:
             case SAI_ATTR_VALUE_TYPE_SYSTEM_PORT_CONFIG_LIST:
             case SAI_ATTR_VALUE_TYPE_PORT_ERR_STATUS_LIST:
@@ -2610,6 +2615,7 @@ void check_attr_is_primitive(
         case SAI_ATTR_VALUE_TYPE_SYSTEM_PORT_CONFIG_LIST:
         case SAI_ATTR_VALUE_TYPE_PORT_ERR_STATUS_LIST:
         case SAI_ATTR_VALUE_TYPE_UINT16_RANGE_LIST:
+        case SAI_ATTR_VALUE_TYPE_PORT_LANE_LATCH_STATUS_LIST:
 
             if (md->isprimitive)
             {
@@ -2667,6 +2673,7 @@ void check_attr_is_primitive(
         case SAI_ATTR_VALUE_TYPE_MACSEC_SALT:
         case SAI_ATTR_VALUE_TYPE_SYSTEM_PORT_CONFIG:
         case SAI_ATTR_VALUE_TYPE_FABRIC_PORT_REACHABILITY:
+        case SAI_ATTR_VALUE_TYPE_LATCH_STATUS:
 
             if (!md->isprimitive)
             {