Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add hypervisor 2-stage translation test #558

Merged
merged 11 commits into from
Nov 12, 2024
4 changes: 3 additions & 1 deletion isa/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ include $(src_dir)/rv64si/Makefrag
include $(src_dir)/rv64ssvnapot/Makefrag
include $(src_dir)/rv64mi/Makefrag
include $(src_dir)/rv64mzicbo/Makefrag
include $(src_dir)/hypervisor/Makefrag
endif
include $(src_dir)/rv32ui/Makefrag
include $(src_dir)/rv32uc/Makefrag
Expand Down Expand Up @@ -58,7 +59,7 @@ vpath %.S $(src_dir)
$(RISCV_OBJDUMP) $< > $@

%.out: %
$(RISCV_SIM) --isa=rv64gc_zfh_zicboz_svnapot_zicntr_zba_zbb_zbc_zbs --misaligned $< 2> $@
$(RISCV_SIM) --isa=rv64gch_zfh_zicboz_svnapot_zicntr_zba_zbb_zbc_zbs --misaligned $< 2> $@

%.out32: %
$(RISCV_SIM) --isa=rv32gc_zfh_zicboz_svnapot_zicntr_zba_zbb_zbc_zbs --misaligned $< 2> $@
Expand Down Expand Up @@ -116,6 +117,7 @@ $(eval $(call compile_template,rv64mzicbo,-march=rv64g_zicboz -mabi=lp64))
$(eval $(call compile_template,rv64si,-march=rv64g -mabi=lp64))
$(eval $(call compile_template,rv64ssvnapot,-march=rv64g -mabi=lp64))
$(eval $(call compile_template,rv64mi,-march=rv64g -mabi=lp64))
$(eval $(call compile_template,hypervisor,-march=rv64gh -mabi=lp64))
endif

tests_dump = $(addsuffix .dump, $(tests))
Expand Down
136 changes: 136 additions & 0 deletions isa/hypervisor/2-stage_translation.S
Original file line number Diff line number Diff line change
@@ -0,0 +1,136 @@
# See LICENSE for license details.

#*****************************************************************************
# 2-stage_translation.S
#-----------------------------------------------------------------------------
#
# Set 2 stage translation, do a simple load store.
#

#include "riscv_test.h"
#include "test_macros.h"

#define vspt0_gpa 0x0
#define vspt1_gpa 0x1000
#define vspt2_gpa 0x2000
#define GPA 0x200000

RVTEST_RV64M
RVTEST_CODE_BEGIN

li TESTNUM, 2

# map GVA 0x0~0xfff to GPA 0x200000~0x200fff
vs_pt_init:
li t0, vspt1_gpa
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V
sd t0, vspt_0, t1

li t0, vspt2_gpa
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V
sd t0, vspt_1, t1

li t0, GPA
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V | PTE_X | PTE_A | PTE_D | PTE_R | PTE_W
sd t0, vspt_2, t1

init_vsatp:
li a0, (SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV39
la a1, vspt0_gpa
srl a1, a1, RISCV_PGSHIFT
or a1, a1, a0
csrw vsatp, a1
hfence.vvma


# map GPA 0x200000~0x200fff to data_page
guest_pt_init:
la t0, gpt_1
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V
sd t0, gpt_0, t1

la t0, gpt_2
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V
sd t0, gpt_1, t1

la t0, gpt_3
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V
sd t0, gpt_1 + 8, t1

la t0, vspt_0
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V | PTE_R | PTE_W | PTE_A | PTE_D | PTE_U
sd t0, gpt_2, t1

la t0, vspt_1
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V | PTE_R | PTE_W | PTE_A | PTE_D | PTE_U
sd t0, gpt_2 + 8, t1

la t0, vspt_2
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V | PTE_R | PTE_W | PTE_A | PTE_D | PTE_U
sd t0, gpt_2 + 16, t1

la t0, data_page
srl t0, t0, RISCV_PGSHIFT - PTE_PPN_SHIFT
ori t0, t0, PTE_V | PTE_R | PTE_W | PTE_A | PTE_D | PTE_U
sd t0, gpt_3, t1

init_hgatp:
li a0, (SATP_MODE & ~(SATP_MODE<<1)) * SATP_MODE_SV39
la a1, gpt_0
srl a1, a1, RISCV_PGSHIFT
or a1, a1, a0
csrw hgatp, a1
hfence.gvma

hstatus_init:
li a0, HSTATUS_SPVP
csrs hstatus, a0

la a0, data_page
li a1, 0x12345678
sw a1, 0(a0)

li t0, 0x0
hlv.w t2, 0(t0) # should be 0x12345678
hsv.w t2, 0(t0)
bne t2, a1, fail

RVTEST_PASS

TEST_PASSFAIL

RVTEST_CODE_END

.data
RVTEST_DATA_BEGIN

TEST_DATA

.align 12
vspt_0: .dword 0
.align 12
vspt_1: .dword 0
.align 12
vspt_2: .dword 0

.align 14
gpt_0: .dword 0
.align 12
gpt_1: .dword 0
.align 12
gpt_2: .dword 0
.align 12
gpt_3: .dword 0
.align 12
data_page: .dword 0

RVTEST_DATA_END
8 changes: 8 additions & 0 deletions isa/hypervisor/Makefrag
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
#=======================================================================
# Makefrag for hypervisor tests
#-----------------------------------------------------------------------

hypervisor_sc_tests = \
2-stage-translation \

hypervisor_p_tests = $(addprefix hypervisor-p-, $(hypervisor_sc_tests))