Revert "Add Sail code from Nambi to documentation"

Makefile

@@ -14,7 +14,6 @@ build:
     --require=asciidoctor-bibtex \
     --require=asciidoctor-diagram \
     --require=asciidoctor-mathematical \
-    --require=asciidoctor-sail \
     --out-file=$(PDF_RESULT) \
     $(HEADER_SOURCE)
 

Zc-specification/Zc.adoc

@@ -1,8 +1,6 @@
 :sectnums:
 :version-label: v1.0.3-1
 :lifecycle-state: frozen
-:sail-doc: Zc-specification/sail_zc_doc.json
-:source-highlighter: rouge
 
 [#Zc]
 == Zc* {version-label}

Zc-specification/c_lbu.adoc

@@ -11,7 +11,14 @@ c.lbu _rd'_, _uimm_(_rs1'_)
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_LBU(_, _, _)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x0, attr: ['C0'] },
+    { bits:  3, name: 'rd\'' },
+    { bits:  2, name: 'uimm[0|1]' },
+    { bits:  3, name: 'rs1\'' },
+    { bits:  3, name: 0x0 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 include::c_lbsb_imm_offset.adoc[]
@@ -29,7 +36,11 @@ None
 <<insns-lbu>>
 
 Operation::
-+
-sail::execute[clause="C_LBU(_, _, _)",part=body,dedent]
+[source,sail]
+--
+//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.
+
+X(rdc) = EXTZ(mem[X(rs1c)+EXTZ(uimm)][7..0]);
+--
 
 include::Zcb_footer.adoc[]

Zc-specification/c_lh.adoc

@@ -11,7 +11,15 @@ c.lh _rd'_, _uimm_(_rs1'_)
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_LH(_, _, _)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x0, attr: ['C0'] },
+    { bits:  3, name: 'rd\'' },
+    { bits:  1, name: 'uimm[1]' },
+    { bits:  1, name: 0x1 },
+    { bits:  3, name: 'rs1\'' },
+    { bits:  3, name: 0x1 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 include::c_lhsh_imm_offset.adoc[]
@@ -29,7 +37,12 @@ None
 <<insns-lh>>
 
 Operation::
-+
-sail::execute[clause="C_LH(_, _, _)",part=body,dedent]
+[source,sail]
+--
+//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.
+
+X(rdc) = EXTS(load_mem[X(rs1c)+EXTZ(uimm)][15..0]);
+--
 
 include::Zcb_footer.adoc[]
+

Zc-specification/c_lhu.adoc

@@ -11,7 +11,15 @@ c.lhu _rd'_, _uimm_(_rs1'_)
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_LHU(_, _, _)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x0, attr: ['C0'] },
+    { bits:  3, name: 'rd\'' },
+    { bits:  1, name: 'uimm[1]' },
+    { bits:  1, name: 0x0 },
+    { bits:  3, name: 'rs1\'' },
+    { bits:  3, name: 0x1 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 include::c_lhsh_imm_offset.adoc[]
@@ -29,8 +37,12 @@ None
 <<insns-lhu>>
 
 Operation::
-+
-sail::execute[clause="C_LHU(_, _, _)",part=body,dedent]
+[source,sail]
+--
+//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.
+
+X(rdc) = EXTZ(load_mem[X(rs1c)+EXTZ(uimm)][15..0]);
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_mul.adoc

@@ -11,7 +11,14 @@ c.mul _rsd'_, _rs2'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_MUL(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 'rs2\'', attr: ['SRC2']  },
+    { bits:  2, name: 0x2, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -31,8 +38,11 @@ M or Zmmul must be configured.
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_, and for _rs2'_ is called _rs2c_.
 
 Operation::
-+
-sail::execute[clause="C_MUL(_)",part=body,dedent]
+[source,sail]
+--
+let result_wide = to_bits(2 * sizeof(xlen), signed(X(rsdc)) * signed(X(rs2c)));
+X(rsdc) = result_wide[(sizeof(xlen) - 1) .. 0];
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_not.adoc

@@ -11,7 +11,14 @@ c.not _rd'/rs1'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_NOT(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x5, attr: ['C.NOT'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -34,8 +41,10 @@ xori rd'/rs1', rd'/rs1', -1
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_.
 
 Operation::
-+
-sail::execute[clause="C_NOT(_)",part=body,dedent]
+[source,sail]
+--
+X(rsdc) = X(rsdc) XOR -1;
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_sb.adoc

@@ -11,7 +11,14 @@ c.sb _rs2'_, _uimm_(_rs1'_)
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_SB(_, _, _)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x0, attr: ['C0'] },
+    { bits:  3, name: 'rs2\'' },
+    { bits:  2, name: 'uimm[0|1]' },
+    { bits:  3, name: 'rs1\'' },
+    { bits:  3, name: 0x2 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 include::c_lbsb_imm_offset.adoc[]
@@ -29,7 +36,11 @@ None
 <<insns-sb>>
 
 Operation::
-+
-sail::execute[clause="C_SB(_, _, _)",part=body,dedent]
+[source,sail]
+--
+//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.
+
+mem[X(rs1c)+EXTZ(uimm)][7..0] = X(rs2c)
+--
 
 include::Zcb_footer.adoc[]

Zc-specification/c_sext_b.adoc

@@ -11,7 +11,14 @@ c.sext.b _rd'/rs1'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_SEXT_B(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x1, attr: ['C.SEXT.B'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -33,7 +40,9 @@ Zbb is also required.
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_.
 
 Operation::
-+
-sail::execute[clause="C_SEXT_B(_)",part=body,dedent]
+[source,sail]
+--
+X(rsdc) = EXTS(X(rsdc)[7..0]);
+--
 
 include::Zcb_footer.adoc[]

Zc-specification/c_sext_h.adoc

@@ -11,7 +11,14 @@ c.sext.h _rd'/rs1'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_SEXT_H(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x3, attr: ['C.SEXT.H'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -33,8 +40,10 @@ Zbb is also required.
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_.
 
 Operation::
-+
-sail::execute[clause="C_SEXT_H(_)",part=body,dedent]
+[source,sail]
+--
+X(rsdc) = EXTS(X(rsdc)[15..0]);
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_sh.adoc

@@ -11,7 +11,15 @@ c.sh _rs2'_, _uimm_(_rs1'_)
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_SH(_, _, _)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x0, attr: ['C0'] },
+    { bits:  3, name: 'rs2\'' },
+    { bits:  1, name: 'uimm[1]' },
+    { bits:  1, name: '0' },
+    { bits:  3, name: 'rs1\'' },
+    { bits:  3, name: 0x3 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 include::c_lhsh_imm_offset.adoc[]
@@ -29,8 +37,12 @@ None
 <<insns-sh>>
 
 Operation::
-+
-sail::execute[clause="C_SH(_, _, _)",part=body,dedent]
+[source,sail]
+--
+//This is not SAIL, it's pseudo-code. The SAIL hasn't been written yet.
+
+mem[X(rs1c)+EXTZ(uimm)][15..0] = X(rs2c)
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_zext_b.adoc

@@ -11,7 +11,14 @@ c.zext.b _rd'/rs1'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_ZEXT_B(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x0, attr: ['C.ZEXT.B'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -36,8 +43,10 @@ andi rd'/rs1', rd'/rs1', 0xff
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_.
 
 Operation::
-+
-sail::execute[clause="C_ZEXT_B(_)",part=body,dedent]
+[source,sail]
+--
+X(rsdc) = EXTZ(X(rsdc)[7..0]);
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_zext_h.adoc

@@ -11,7 +11,14 @@ c.zext.h _rd'/rs1'_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_ZEXT_H(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x2, attr: ['C.ZEXT.H'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -34,8 +41,9 @@ Zbb is also required.
 
 Operation::
 [source,sail]
-+
-sail::execute[clause="C_ZEXT_H(_)",part=body,dedent]
+--
+X(rsdc) = EXTZ(X(rsdc)[15..0]);
+--
 
 include::Zcb_footer.adoc[]
 

Zc-specification/c_zext_w.adoc

@@ -11,7 +11,14 @@ c.zext.w _rd'/rs1'_
 Encoding (RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="C_ZEXT_W(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x1, attr: ['C1'] },
+    { bits:  3, name: 0x4, attr: ['C.ZEXT.W'] },
+    { bits:  2, name: 0x3, attr: ['FUNCT2'] },
+    { bits:  3, name: 'rd\'/rs1\'', attr: ['SRCDST'] },
+    { bits:  3, name: 0x7 },
+    { bits:  3, name: 0x4, attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 Description::
@@ -36,7 +43,9 @@ add.uw rd'/rs1', rd'/rs1', zero
   The SAIL module variable for _rd'/rs1'_ is called _rsdc_.
 
 Operation::
-+
-sail::execute[clause="C_ZEXT_W(_)",part=body,dedent]
+[source,sail]
+--
+X(rsdc) = EXTZ(X(rsdc)[31..0]);
+--
 
 include::Zcb_footer.adoc[]

Zc-specification/cm_jalt.adoc

@@ -11,7 +11,12 @@ cm.jalt _index_
 Encoding (RV32, RV64)::
 [wavedrom, , svg]
 ....
-include::sailwavedrom:encdec_compressed[left-clause="CM_JALT(_)",right,type=mapping,raw]
+{reg:[
+    { bits:  2, name: 0x2,      attr: ['C2'] },
+    { bits:  8, name: 'index',  attr: [] },
+    { bits:  3, name: 0x0,      attr: [] },
+    { bits:  3, name: 0x5,      attr: ['FUNCT3'] },
+],config:{bits:16}}
 ....
 
 [NOTE]