Support more ARM N and V parts

rr-debugger · Oct 7, 2024 · b3ffa76 · b3ffa76
1 parent 972ef90
commit b3ffa76
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Showing 2 changed files with 26 additions and 6 deletions.
diff --git a/src/PerfCounters.cc b/src/PerfCounters.cc
@@ -108,9 +108,13 @@ enum CpuMicroarch {
   LastAMD = AMDZen4,
   FirstARM,
   ARMNeoverseN1 = FirstARM,
+  ARMNeoverseN2,
+  ARMNeoverseN3,
   ARMNeoverseE1,
   ARMNeoverseV1,
-  ARMNeoverseN2,
+  ARMNeoverseV2,
+  ARMNeoverseV3AE,
+  ARMNeoverseV3,
   ARMCortexA55,
   ARMCortexA75,
   ARMCortexA76,
@@ -215,9 +219,17 @@ static const PmuConfig pmu_configs[] = {
   // 0x11 == CPU_CYCLES - Cycle
   { ARMNeoverseN1, "ARM Neoverse N1", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
     "armv8_pmuv3_0", 0x11, -1, -1 },
+  { ARMNeoverseN2, "ARM Neoverse N2", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
+    "armv8_pmuv3_0", 0x11, -1, -1 },
+  { ARMNeoverseN3, "ARM Neoverse N3", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
+    "armv8_pmuv3_0", 0x11, -1, -1 },
   { ARMNeoverseV1, "ARM Neoverse V1", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
     "armv8_pmuv3_0", 0x11, -1, -1 },
-  { ARMNeoverseN2, "ARM Neoverse N2", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
+  { ARMNeoverseV2, "ARM Neoverse V2", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
+    "armv8_pmuv3_0", 0x11, -1, -1 },
+  { ARMNeoverseV3AE, "ARM Neoverse V3AE", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
+    "armv8_pmuv3_0", 0x11, -1, -1 },
+  { ARMNeoverseV3, "ARM Neoverse V3", 0x21, 0, 0x6F, 1000, PMU_TICKS_TAKEN_BRANCHES,
     "armv8_pmuv3_0", 0x11, -1, -1 },
   { ARMCortexA76, "ARM Cortex A76", 0x21, 0, 0x6F, 10000, PMU_TICKS_TAKEN_BRANCHES,
     "armv8_pmuv3", 0x11, -1, -1 },

diff --git a/src/PerfCounters_aarch64.h b/src/PerfCounters_aarch64.h
@@ -41,22 +41,30 @@ static CpuMicroarch compute_cpu_microarch(const CPUID &cpuid) {
       return ARMCortexA75;
     case 0xd0b:
       return ARMCortexA76;
-    case 0xd0c:
-      return ARMNeoverseN1;
     case 0xd0d:
       return ARMCortexA77;
-    case 0xd40:
-      return ARMNeoverseV1;
     case 0xd41:
     case 0xd4b: // ARM Cortex A78C
       return ARMCortexA78;
     case 0xd44:
     case 0xd4c: // ARM Cortex X1C
       return ARMCortexX1;
+    case 0xd0c:
+      return ARMNeoverseN1;
     case 0xd49:
       return ARMNeoverseN2;
+    case 0xd8e:
+      return ARMNeoverseN3;
     case 0xd4a:
       return ARMNeoverseE1;
+    case 0xd40:
+      return ARMNeoverseV1;
+    case 0xd4f:
+      return ARMNeoverseV2;
+    case 0xd83:
+      return ARMNeoverseV3AE;
+    case 0xd84:
+      return ARMNeoverseV3;
     }
     break;
   case 0x51: // Qualcomm