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Rollup of 10 pull requests #119570

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bd7263c
Promote `riscv32{im|imafc}` targets to tier 2
MabezDev Dec 7, 2023
af44e71
Switch from using `//~ERROR` annotations with `--error-format` to `er…
Rajveer100 Dec 21, 2023
0f9baa8
custom mir: make it clear what the return block is
RalfJung Dec 26, 2023
4bf2794
custom mir: better type-checking
RalfJung Dec 26, 2023
437f07b
add test for #117626
bvanjoi Dec 28, 2023
7e3f5f8
Use Result::flatten in catch_with_exit_code
DaniPopes Dec 28, 2023
c0fa85e
Remove libtest's dylib
saethlin Dec 31, 2023
09bb07e
Make offset_of field parsing use metavariable which handles any spacing
GKFX Jan 2, 2024
f0c0a49
Update after rebase
GKFX Jan 2, 2024
ee41651
Support reg_addr register class in s390x inline assembly
taiki-e Jan 3, 2024
862368d
fallback visibility for unexpected trait item
bvanjoi Jan 3, 2024
1490bba
add and document a new `is_system_llvm` abstraction
jyn514 Dec 25, 2023
b5ccbcb
add a new `optimized_compiler_builtins` option
jyn514 Dec 25, 2023
b05273b
Rollup merge of #117636 - bvanjoi:fix-117626, r=TaKO8Ki
matthiaskrgr Jan 4, 2024
b5fa86e
Rollup merge of #118704 - esp-rs:rv32-tier-2, r=davidtwco
matthiaskrgr Jan 4, 2024
2def6c7
Rollup merge of #119184 - Rajveer100:branch-for-issue-118752, r=david…
matthiaskrgr Jan 4, 2024
659b981
Rollup merge of #119325 - RalfJung:custom-mir, r=compiler-errors
matthiaskrgr Jan 4, 2024
b705437
Rollup merge of #119391 - DaniPopes:catch-flatten, r=davidtwco
matthiaskrgr Jan 4, 2024
52bcc68
Rollup merge of #119431 - taiki-e:asm-s390x-reg-addr, r=Amanieu
matthiaskrgr Jan 4, 2024
6129278
Rollup merge of #119475 - saethlin:remove-libtest-dylib, r=cuviper
matthiaskrgr Jan 4, 2024
94b03af
Rollup merge of #119532 - GKFX:offset-of-parse-expr, r=est31
matthiaskrgr Jan 4, 2024
edb2a1c
Rollup merge of #119553 - bvanjoi:fix-119463, r=petrochenkov
matthiaskrgr Jan 4, 2024
b889dd5
Rollup merge of #119556 - onur-ozkan:optimized-compiler-builtins, r=o…
matthiaskrgr Jan 4, 2024
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5 changes: 4 additions & 1 deletion compiler/rustc_codegen_gcc/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -634,6 +634,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
}
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::Err => unreachable!(),
}
Expand Down Expand Up @@ -704,7 +705,9 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
bug!("LLVM backend does not support SPIR-V")
},
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::S390x(
S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr
) => cx.type_i32(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
InlineAsmRegClass::Err => unreachable!(),
}
Expand Down
5 changes: 4 additions & 1 deletion compiler/rustc_codegen_llvm/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -690,6 +690,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => "w",
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg_addr) => "a",
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => "r",
Expand Down Expand Up @@ -867,7 +868,9 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_pair) => cx.type_i16(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_iw) => cx.type_i16(),
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => cx.type_i16(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::S390x(
S390xInlineAsmRegClass::reg | S390xInlineAsmRegClass::reg_addr,
) => cx.type_i32(),
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(),
InlineAsmRegClass::M68k(M68kInlineAsmRegClass::reg) => cx.type_i32(),
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_driver_impl/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
#![feature(lazy_cell)]
#![feature(let_chains)]
#![feature(panic_update_hook)]
#![feature(result_flattening)]
#![recursion_limit = "256"]
#![deny(rustc::untranslatable_diagnostic)]
#![deny(rustc::diagnostic_outside_of_impl)]
Expand Down Expand Up @@ -1249,8 +1250,7 @@ pub fn catch_fatal_errors<F: FnOnce() -> R, R>(f: F) -> Result<R, ErrorGuarantee
/// Variant of `catch_fatal_errors` for the `interface::Result` return type
/// that also computes the exit code.
pub fn catch_with_exit_code(f: impl FnOnce() -> interface::Result<()>) -> i32 {
let result = catch_fatal_errors(f).and_then(|result| result);
match result {
match catch_fatal_errors(f).flatten() {
Ok(()) => EXIT_SUCCESS,
Err(_) => EXIT_FAILURE,
}
Expand Down
12 changes: 10 additions & 2 deletions compiler/rustc_mir_build/src/build/custom/parse/instruction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -61,7 +61,7 @@ impl<'tcx, 'body> ParseCtxt<'tcx, 'body> {
@call(mir_drop, args) => {
Ok(TerminatorKind::Drop {
place: self.parse_place(args[0])?,
target: self.parse_block(args[1])?,
target: self.parse_return_to(args[1])?,
unwind: self.parse_unwind_action(args[2])?,
replace: false,
})
Expand Down Expand Up @@ -104,6 +104,14 @@ impl<'tcx, 'body> ParseCtxt<'tcx, 'body> {
)
}

fn parse_return_to(&self, expr_id: ExprId) -> PResult<BasicBlock> {
parse_by_kind!(self, expr_id, _, "return block",
@call(mir_return_to, args) => {
self.parse_block(args[0])
},
)
}

fn parse_match(&self, arms: &[ArmId], span: Span) -> PResult<SwitchTargets> {
let Some((otherwise, rest)) = arms.split_last() else {
return Err(ParseError {
Expand Down Expand Up @@ -146,7 +154,7 @@ impl<'tcx, 'body> ParseCtxt<'tcx, 'body> {
ExprKind::Assign { lhs, rhs } => (*lhs, *rhs),
);
let destination = self.parse_place(destination)?;
let target = self.parse_block(args[1])?;
let target = self.parse_return_to(args[1])?;
let unwind = self.parse_unwind_action(args[2])?;

parse_by_kind!(self, call, _, "function call",
Expand Down
4 changes: 4 additions & 0 deletions compiler/rustc_parse/messages.ftl
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,8 @@ parse_ambiguous_range_pattern = the range pattern here has ambiguous interpretat
parse_array_brackets_instead_of_braces = this is a block expression, not an array
.suggestion = to make an array, use square brackets instead of curly braces

parse_array_index_offset_of = array indexing not supported in offset_of

parse_assignment_else_not_allowed = <assignment> ... else {"{"} ... {"}"} is not allowed

parse_assoc_lifetime = associated lifetimes are not supported
Expand Down Expand Up @@ -405,6 +407,8 @@ parse_invalid_logical_operator = `{$incorrect}` is not a logical operator

parse_invalid_meta_item = expected unsuffixed literal or identifier, found `{$token}`

parse_invalid_offset_of = offset_of expects dot-separated field and variant names

parse_invalid_unicode_escape = invalid unicode character escape
.label = invalid escape
.help = unicode escape must {$surrogate ->
Expand Down
8 changes: 8 additions & 0 deletions compiler/rustc_parse/src/errors.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2887,3 +2887,11 @@ pub(crate) struct TransposeDynOrImplSugg<'a> {
pub insertion_span: Span,
pub kw: &'a str,
}

#[derive(Diagnostic)]
#[diag(parse_array_index_offset_of)]
pub(crate) struct ArrayIndexInOffsetOf(#[primary_span] pub Span);

#[derive(Diagnostic)]
#[diag(parse_invalid_offset_of)]
pub(crate) struct InvalidOffsetOf(#[primary_span] pub Span);
164 changes: 121 additions & 43 deletions compiler/rustc_parse/src/parser/expr.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1023,7 +1023,7 @@ impl<'a> Parser<'a> {
// we should break everything including floats into more basic proc-macro style
// tokens in the lexer (probably preferable).
// See also `TokenKind::break_two_token_op` which does similar splitting of `>>` into `>`.
fn break_up_float(&mut self, float: Symbol) -> DestructuredFloat {
fn break_up_float(&self, float: Symbol, span: Span) -> DestructuredFloat {
#[derive(Debug)]
enum FloatComponent {
IdentLike(String),
Expand Down Expand Up @@ -1053,7 +1053,6 @@ impl<'a> Parser<'a> {
// With proc macros the span can refer to anything, the source may be too short,
// or too long, or non-ASCII. It only makes sense to break our span into components
// if its underlying text is identical to our float literal.
let span = self.token.span;
let can_take_span_apart =
|| self.span_to_snippet(span).as_deref() == Ok(float_str).as_deref();

Expand Down Expand Up @@ -1115,7 +1114,7 @@ impl<'a> Parser<'a> {
float: Symbol,
suffix: Option<Symbol>,
) -> P<Expr> {
match self.break_up_float(float) {
match self.break_up_float(float, self.token.span) {
// 1e2
DestructuredFloat::Single(sym, _sp) => {
self.parse_expr_tuple_field_access(lo, base, sym, suffix, None)
Expand Down Expand Up @@ -1143,40 +1142,105 @@ impl<'a> Parser<'a> {
}
}

fn parse_field_name_maybe_tuple(&mut self) -> PResult<'a, ThinVec<Ident>> {
let token::Literal(token::Lit { kind: token::Float, symbol, suffix }) = self.token.kind
else {
return Ok(thin_vec![self.parse_field_name()?]);
};
Ok(match self.break_up_float(symbol) {
// 1e2
DestructuredFloat::Single(sym, sp) => {
self.bump();
thin_vec![Ident::new(sym, sp)]
}
// 1.
DestructuredFloat::TrailingDot(sym, sym_span, dot_span) => {
assert!(suffix.is_none());
// Analogous to `Self::break_and_eat`
self.break_last_token = true;
// This might work, in cases like `1. 2`, and might not,
// in cases like `offset_of!(Ty, 1.)`. It depends on what comes
// after the float-like token, and therefore we have to make
// the other parts of the parser think that there is a dot literal.
self.token = Token::new(token::Ident(sym, false), sym_span);
self.bump_with((Token::new(token::Dot, dot_span), self.token_spacing));
thin_vec![Ident::new(sym, sym_span)]
}
// 1.2 | 1.2e3
DestructuredFloat::MiddleDot(symbol1, ident1_span, _dot_span, symbol2, ident2_span) => {
self.bump();
thin_vec![Ident::new(symbol1, ident1_span), Ident::new(symbol2, ident2_span)]
/// Parse the field access used in offset_of, matched by `$(e:expr)+`.
/// Currently returns a list of idents. However, it should be possible in
/// future to also do array indices, which might be arbitrary expressions.
fn parse_floating_field_access(&mut self) -> PResult<'a, P<[Ident]>> {
let mut fields = Vec::new();
let mut trailing_dot = None;

loop {
// This is expected to use a metavariable $(args:expr)+, but the builtin syntax
// could be called directly. Calling `parse_expr` allows this function to only
// consider `Expr`s.
let expr = self.parse_expr()?;
let mut current = &expr;
let start_idx = fields.len();
loop {
match current.kind {
ExprKind::Field(ref left, right) => {
// Field access is read right-to-left.
fields.insert(start_idx, right);
trailing_dot = None;
current = left;
}
// Parse this both to give helpful error messages and to
// verify it can be done with this parser setup.
ExprKind::Index(ref left, ref _right, span) => {
self.dcx().emit_err(errors::ArrayIndexInOffsetOf(span));
current = left;
}
ExprKind::Lit(token::Lit {
kind: token::Float | token::Integer,
symbol,
suffix,
}) => {
if let Some(suffix) = suffix {
self.expect_no_tuple_index_suffix(current.span, suffix);
}
match self.break_up_float(symbol, current.span) {
// 1e2
DestructuredFloat::Single(sym, sp) => {
trailing_dot = None;
fields.insert(start_idx, Ident::new(sym, sp));
}
// 1.
DestructuredFloat::TrailingDot(sym, sym_span, dot_span) => {
assert!(suffix.is_none());
trailing_dot = Some(dot_span);
fields.insert(start_idx, Ident::new(sym, sym_span));
}
// 1.2 | 1.2e3
DestructuredFloat::MiddleDot(
symbol1,
span1,
_dot_span,
symbol2,
span2,
) => {
trailing_dot = None;
fields.insert(start_idx, Ident::new(symbol2, span2));
fields.insert(start_idx, Ident::new(symbol1, span1));
}
DestructuredFloat::Error => {
trailing_dot = None;
fields.insert(start_idx, Ident::new(symbol, self.prev_token.span));
}
}
break;
}
ExprKind::Path(None, Path { ref segments, .. }) => {
match &segments[..] {
[PathSegment { ident, args: None, .. }] => {
trailing_dot = None;
fields.insert(start_idx, *ident)
}
_ => {
self.dcx().emit_err(errors::InvalidOffsetOf(current.span));
break;
}
}
break;
}
_ => {
self.dcx().emit_err(errors::InvalidOffsetOf(current.span));
break;
}
}
}
DestructuredFloat::Error => {
self.bump();
thin_vec![Ident::new(symbol, self.prev_token.span)]

if matches!(self.token.kind, token::CloseDelim(..) | token::Comma) {
break;
} else if trailing_dot.is_none() {
// This loop should only repeat if there is a trailing dot.
self.dcx().emit_err(errors::InvalidOffsetOf(self.token.span));
break;
}
})
}
if let Some(dot) = trailing_dot {
self.dcx().emit_err(errors::InvalidOffsetOf(dot));
}
Ok(fields.into_iter().collect())
}

fn parse_expr_tuple_field_access(
Expand Down Expand Up @@ -1907,15 +1971,29 @@ impl<'a> Parser<'a> {
let container = self.parse_ty()?;
self.expect(&TokenKind::Comma)?;

let seq_sep = SeqSep { sep: Some(token::Dot), trailing_sep_allowed: false };
let (fields, _trailing, _recovered) = self.parse_seq_to_before_end(
&TokenKind::CloseDelim(Delimiter::Parenthesis),
seq_sep,
Parser::parse_field_name_maybe_tuple,
)?;
let fields = fields.into_iter().flatten().collect::<Vec<_>>();
let fields = self.parse_floating_field_access()?;
let trailing_comma = self.eat_noexpect(&TokenKind::Comma);

if let Err(mut e) =
self.expect_one_of(&[], &[TokenKind::CloseDelim(Delimiter::Parenthesis)])
{
if trailing_comma {
e.note("unexpected third argument to offset_of");
} else {
e.note("offset_of expects dot-separated field and variant names");
}
e.emit();
}

// Eat tokens until the macro call ends.
if self.may_recover() {
while !matches!(self.token.kind, token::CloseDelim(..) | token::Eof) {
self.bump();
}
}

let span = lo.to(self.token.span);
Ok(self.mk_expr(span, ExprKind::OffsetOf(container, fields.into())))
Ok(self.mk_expr(span, ExprKind::OffsetOf(container, fields)))
}

/// Returns a string literal if the next token is a string literal.
Expand Down
11 changes: 10 additions & 1 deletion compiler/rustc_resolve/src/late.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3076,7 +3076,16 @@ impl<'a: 'ast, 'b, 'ast, 'tcx> LateResolutionVisitor<'a, 'b, 'ast, 'tcx> {
}

let feed_visibility = |this: &mut Self, def_id| {
let vis = this.r.tcx.visibility(def_id).expect_local();
let vis = this.r.tcx.visibility(def_id);
let vis = if vis.is_visible_locally() {
vis.expect_local()
} else {
this.r.dcx().span_delayed_bug(
span,
"error should be emitted when an unexpected trait item is used",
);
rustc_middle::ty::Visibility::Public
};
this.r.feed_visibility(this.r.local_def_id(id), vis);
};

Expand Down
1 change: 1 addition & 0 deletions compiler/rustc_span/src/symbol.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1041,6 +1041,7 @@ symbols! {
mir_offset,
mir_retag,
mir_return,
mir_return_to,
mir_set_discriminant,
mir_static,
mir_static_mut,
Expand Down
29 changes: 15 additions & 14 deletions compiler/rustc_target/src/asm/s390x.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ use std::fmt;
def_reg_class! {
S390x S390xInlineAsmRegClass {
reg,
reg_addr,
freg,
}
}
Expand Down Expand Up @@ -36,7 +37,7 @@ impl S390xInlineAsmRegClass {
arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<Symbol>)] {
match (self, arch) {
(Self::reg, _) => types! { _: I8, I16, I32, I64; },
(Self::reg | Self::reg_addr, _) => types! { _: I8, I16, I32, I64; },
(Self::freg, _) => types! { _: F32, F64; },
}
}
Expand All @@ -45,19 +46,19 @@ impl S390xInlineAsmRegClass {
def_regs! {
S390x S390xInlineAsmReg S390xInlineAsmRegClass {
r0: reg = ["r0"],
r1: reg = ["r1"],
r2: reg = ["r2"],
r3: reg = ["r3"],
r4: reg = ["r4"],
r5: reg = ["r5"],
r6: reg = ["r6"],
r7: reg = ["r7"],
r8: reg = ["r8"],
r9: reg = ["r9"],
r10: reg = ["r10"],
r12: reg = ["r12"],
r13: reg = ["r13"],
r14: reg = ["r14"],
r1: reg, reg_addr = ["r1"],
r2: reg, reg_addr = ["r2"],
r3: reg, reg_addr = ["r3"],
r4: reg, reg_addr = ["r4"],
r5: reg, reg_addr = ["r5"],
r6: reg, reg_addr = ["r6"],
r7: reg, reg_addr = ["r7"],
r8: reg, reg_addr = ["r8"],
r9: reg, reg_addr = ["r9"],
r10: reg, reg_addr = ["r10"],
r12: reg, reg_addr = ["r12"],
r13: reg, reg_addr = ["r13"],
r14: reg, reg_addr = ["r14"],
f0: freg = ["f0"],
f1: freg = ["f1"],
f2: freg = ["f2"],
Expand Down
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