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Add SSE2 trivial aliases and conversions. #165

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Nov 2, 2017
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46 changes: 42 additions & 4 deletions src/x86/sse2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1795,6 +1795,13 @@ pub unsafe fn _mm_cvtsd_si64(a: f64x2) -> i64 {
cvtsd2si64(a)
}

/// Alias for [`_mm_cvtsd_si64`](fn._mm_cvtsd_si64_ss.html).
#[cfg(target_arch = "x86_64")]
#[inline(always)]
#[target_feature = "+sse2"]
#[cfg_attr(test, assert_instr(cvtsd2si))]
pub unsafe fn _mm_cvtsd_si64x(a: f64x2) -> i64 { _mm_cvtsd_si64(a) }
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Can you add a test for this please? I know it's an alias, but we should try to cover the full public API.


/// Convert the lower double-precision (64-bit) floating-point element in `b`
/// to a single-precision (32-bit) floating-point element, store the result in
/// the lower element of the return value, and copy the upper element from `a`
Expand All @@ -1806,6 +1813,14 @@ pub unsafe fn _mm_cvtsd_ss(a: f32x4, b: f64x2) -> f32x4 {
cvtsd2ss(a, b)
}

/// Return the lower double-precision (64-bit) floating-point element of "a".
#[inline(always)]
#[target_feature = "+sse2"]
// no particular instruction to test
pub unsafe fn _mm_cvtsd_f64(a: f64x2) -> f64 {
a.extract(0)
}

/// Convert the lower single-precision (32-bit) floating-point element in `b`
/// to a double-precision (64-bit) floating-point element, store the result in
/// the lower element of the return value, and copy the upper element from `a`
Expand Down Expand Up @@ -1845,6 +1860,13 @@ pub unsafe fn _mm_cvttsd_si64(a: f64x2) -> i64 {
cvttsd2si64(a)
}

/// Alias for [`_mm_cvttsd_si64`](fn._mm_cvttsd_si64_ss.html).
#[cfg(target_arch = "x86_64")]
#[inline(always)]
#[target_feature = "+sse2"]
#[cfg_attr(test, assert_instr(cvttsd2si))]
pub unsafe fn _mm_cvttsd_si64x(a: f64x2) -> i64 { _mm_cvttsd_si64(a) }
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Can you add a test for this please? I know it's an alias, but we should try to cover the full public API.


/// Convert packed single-precision (32-bit) floating-point elements in `a` to
/// packed 32-bit integers with truncation.
#[inline(always)]
Expand Down Expand Up @@ -3989,8 +4011,14 @@ mod tests {

let r = sse2::_mm_cvtsd_si64(f64x2::new(f64::MAX, f64::MIN));
assert_eq!(r, i64::MIN);
}

#[cfg(target_arch = "x86_64")]
#[simd_test = "sse2"]
unsafe fn _mm_cvtsd_si64x() {
use std::{f64, i64};

let r = sse2::_mm_cvtsd_si64(f64x2::new(f64::NAN, f64::NAN));
let r = sse2::_mm_cvtsd_si64x(f64x2::new(f64::NAN, f64::NAN));
assert_eq!(r, i64::MIN);
}

Expand Down Expand Up @@ -4022,6 +4050,12 @@ mod tests {
);
}

#[simd_test = "sse2"]
unsafe fn _mm_cvtsd_f64() {
let r = sse2::_mm_cvtsd_f64(f64x2::new(-1.1, 2.2));
assert_eq!(r, -1.1);
}

#[simd_test = "sse2"]
unsafe fn _mm_cvtss_sd() {
use std::{f32, f64};
Expand Down Expand Up @@ -4068,14 +4102,18 @@ mod tests {
#[cfg(target_arch = "x86_64")]
#[simd_test = "sse2"]
unsafe fn _mm_cvttsd_si64() {
use std::{f64, i64};

let a = f64x2::new(-1.1, 2.2);
let r = sse2::_mm_cvttsd_si64(a);
assert_eq!(r, -1_i64);
}

#[cfg(target_arch = "x86_64")]
#[simd_test = "sse2"]
unsafe fn _mm_cvttsd_si64x() {
use std::{f64, i64};

let a = f64x2::new(f64::NEG_INFINITY, f64::NAN);
let r = sse2::_mm_cvttsd_si64(a);
let r = sse2::_mm_cvttsd_si64x(a);
assert_eq!(r, i64::MIN);
}

Expand Down