Skip to content

Commit

Permalink
Fix macOS flashing using esp-idf fix from the PR espressif/esptool/pu…
Browse files Browse the repository at this point in the history
  • Loading branch information
ahmedesabry committed Aug 1, 2024
1 parent b1441b2 commit 52899f9
Show file tree
Hide file tree
Showing 2 changed files with 94 additions and 0 deletions.
44 changes: 44 additions & 0 deletions src/platforms/F1/build_handler.py
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,47 @@ def process_config_generation(ctx: BuilderContext) -> tuple:

pass

# ---------------------------------------------------------------------------- #
# specific tools patching
# ---------------------------------------------------------------------------- #
def process_esptool_patching(ctx: BuilderContext):

# There is a problem for flashing from macOS and it has been resolved on
# this specific commit '7e207d821919982df1ac1a1a5cf9f6e701f36ea1':
# https://github.com/espressif/esptool/pull/718/commits

log('-- patching esptool.py')

espidf_path = ctx.tree.get_submodule_path('esp-idf')
tgt_submodule = f'{espidf_path}/components/esptool_py/esptool'
tgt_file = f'{tgt_submodule}/esptool.py'
patch_file = ctx.tree.get_platform_dir(
ctx.tree.get_platform_name(ctx.cli.get_board())
) + '/esp-idf-patches/esptool/esptool.py.patch'

try:
cmd = f'cd {espidf_path} &&' + \
f' git submodule update {tgt_submodule} && cd -'
subprocess.run(cmd, shell=True, check=True)
except Exception as e:
log(f'failed to init submodule -> {e}', RED)
exit(1)

try:
cmd = f'patch --ignore-whitespace {tgt_file}' + \
f' -R -p0 -s -f --dry-run < {patch_file}'
subprocess.run(cmd, shell=True, check=True)
log('-- patching esptool.py maybe done already', CYAN)
except:
subprocess.run(f'patch {tgt_file} -p0 < {patch_file}',
shell=True, check=True)
log('-- patching esptool.py passed!', GREEN)

pass

# ---------------------------------------------------------------------------- #
# target command processing
# ---------------------------------------------------------------------------- #
def process_command(ctx: BuilderContext):
command = ctx.cli.get_build_command()
board = ctx.cli.get_board()
Expand Down Expand Up @@ -263,6 +304,9 @@ def __log_opt(opt, val):
# ---------------------------------------------------------------------------- #
def run(ctx: BuilderContext) -> None:
log('-- F1 platform build handler started!')

process_esptool_patching(ctx)

process_config_generation(ctx)

process_command(ctx)
Expand Down
50 changes: 50 additions & 0 deletions src/platforms/F1/esp-idf-patches/esptool/esptool.py.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,50 @@
--- ext/esp-idf/components/esptool_py/esptool/esptool.py 2024-08-01 17:16:55
+++ esptool.py 2024-08-01 17:16:43
@@ -23,6 +23,16 @@
import time
import zlib

+# This fix is taken from this PR
+# https://github.com/espressif/esptool/pull/718/commits/7e207d821919982df1ac1a1a5cf9f6e701f36ea1
+import fcntl
+import termios
+
+TIOCMSET = getattr(termios, 'TIOCMSET', 0x5418)
+TIOCMGET = getattr(termios, 'TIOCMGET', 0x5415)
+TIOCM_DTR = getattr(termios, 'TIOCM_DTR', 0x002)
+TIOCM_RTS = getattr(termios, 'TIOCM_RTS', 0x004)
+
try:
import serial
except ImportError:
@@ -614,13 +624,25 @@
fpga_delay = True if self.FPGA_SLOW_BOOT and os.environ.get("ESPTOOL_ENV_FPGA", "").strip() == "1" else False
delay = 7 if fpga_delay else 0.5 if extra_delay else 0.05 # 0.5 needed for ESP32 rev0 and rev1

- self._setDTR(False) # IO0=HIGH
- self._setRTS(True) # EN=LOW, chip in reset
+ self._setDTRAndRTS(False, False)
+ self._setDTRAndRTS(True, True)
+ self._setDTRAndRTS(False, True) # IO0=HIGH & EN=LOW, chip in reset
time.sleep(0.1)
- self._setDTR(True) # IO0=LOW
- self._setRTS(False) # EN=HIGH, chip out of reset
+ self._setDTRAndRTS(True, False) # IO0=LOW & # EN=HIGH, chip out of reset
time.sleep(delay)
- self._setDTR(False) # IO0=HIGH, done
+ self._setDTRAndRTS(False, False) # IO0=HIGH, done
+
+ def _setDTRAndRTS(self, dtr = False, rts = False):
+ status = struct.unpack('I', fcntl.ioctl(self._port.fileno(), TIOCMGET, struct.pack('I', 0)))[0]
+ if dtr:
+ status |= TIOCM_DTR
+ else:
+ status &= ~TIOCM_DTR
+ if rts:
+ status |= TIOCM_RTS
+ else:
+ status &= ~TIOCM_RTS
+ fcntl.ioctl(self._port.fileno(), TIOCMSET, struct.pack('I', status))

def _connect_attempt(self, mode='default_reset', usb_jtag_serial=False, extra_delay=False):
""" A single connection attempt """

0 comments on commit 52899f9

Please sign in to comment.