Update Arista7060X6-PE 256x200G mmu configuration. #19570

r12f · 2024-07-14T22:26:33Z

Why I did it

This PR updates the MMU related configurations on Arista 7060X6-PE device with 256x200G breakout.

Work item tracking

Microsoft ADO (number only): 28707303

How I did it

This PR updates 3 things:

Updated bcm file for optimal MMU settings.
Updated buffer defaults to accommodate the TH5 architecture with 1 ingress pool + 1 egress pool and updated to optimal value.
Updated PG lookups for buffer setups.

How to verify it

Tested with sonic-mgmt tests with xoff/xon tests with updated QoS parameter: https://github.com/sonic-net/sonic-mgmt/pull/13656/files
Local ixia test is passing in lab.

Both verified using 202311 branch for backporting.

Which release branch to backport (provide reason below if selected)

Tested branch (Please provide the tested image version)

202311

Description for the changelog

Update Arista7060X6-PE 256x200G mmu configuration.

Link to config_db schema for YANG module changes

N/A

A picture of a cute animal (not mandatory but encouraged)

r12f · 2024-07-15T17:53:58Z

/azpw ms_conflict

lguohan · 2024-07-15T21:05:30Z

...arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2

+        "egress_lossless_profile": {
+            "pool": "egress_lossless_pool",
+            "size": "0",
+            "static_th": "125995684"


why is this larger than the egress_lossless pool size?

I checked the configuration and also the update today. This setting is indeed larger than egress pool. I have replied the CSP case to confirm the reason, hopefully will get answers soon.

lguohan · 2024-07-15T21:06:24Z

...arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2

+
+{%- macro generate_buffer_pool_and_profiles() %}
+    "BUFFER_POOL": {
+        "ingress_lossless_pool": {


instead of lossless pool, should we say this is ingress_pool?

currently, the qos tests are using these names for grabbing the configurations, so changing the name will cause them to break.

lguohan · 2024-07-15T21:06:38Z

...arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2

+            "mode": "dynamic",
+            "xoff": "29520896"
+        },
+        "egress_lossless_pool": {


should we just say this is egress_pool?

i do not know if other repo (swss/sonic-utilitie) make any assumption on the name, we need to check that.

yes, things like qos tests are currently assuming the name while grabing the configuration, changing the name will cause these tests to break at this moment...

Pterosaur · 2024-07-16T08:29:11Z

/azpw ms_conflict

rick-arista · 2024-07-16T21:46:09Z

...arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/BALANCED/buffers_defaults_t0.j2

@@ -8,7 +8,7 @@
            "size": "165660324",


I believe these values should now be reverted back to reflect the production bcm config, e.g. 121964196 here

not all numbers, these values are the latest recommended ones.

b62e111#diff-38141bc38cf22f25e51d1afa26023349fcb218e27d0c46e8ada19c6c9081111cL2251-L2252

I'm not sure how 165660324 was derived in the second commit, but I believe this change to the SHARED_LIMIT_CELLS needs to be reflected? (240087 * 254 * 2 = 121964196)

I think we are aligned from calculation perspective, however if you check the sai api values that shared by broadcom. the value is indeed this....

r12f · 2024-07-17T03:58:16Z

/azpw ms_conflict

…et#19570) Why I did it This PR updates the MMU related configurations on Arista 7060X6-PE device with 256x200G breakout. Work item tracking Microsoft ADO (number only): 28707303 How I did it This PR updates 3 things: - Updated bcm file for optimal MMU settings. - Updated buffer defaults to accommodate the TH5 architecture with 1 ingress pool + 1 egress pool and updated to optimal value. - Updated PG lookups for buffer setups. How to verify it Tested with sonic-mgmt tests with xoff/xon tests with updated QoS parameter: https://github.com/sonic-net/sonic-mgmt/pull/13656/files Local ixia test is passing in lab. Both verified using 202311 branch for backporting.

mssonicbld · 2024-07-17T16:58:17Z

Cherry-pick PR to 202311: #19604

Why I did it This PR updates the MMU related configurations on Arista 7060X6-PE device with 256x200G breakout. Work item tracking Microsoft ADO (number only): 28707303 How I did it This PR updates 3 things: - Updated bcm file for optimal MMU settings. - Updated buffer defaults to accommodate the TH5 architecture with 1 ingress pool + 1 egress pool and updated to optimal value. - Updated PG lookups for buffer setups. How to verify it Tested with sonic-mgmt tests with xoff/xon tests with updated QoS parameter: https://github.com/sonic-net/sonic-mgmt/pull/13656/files Local ixia test is passing in lab. Both verified using 202311 branch for backporting.

…et#19570) Why I did it This PR updates the MMU related configurations on Arista 7060X6-PE device with 256x200G breakout. Work item tracking Microsoft ADO (number only): 28707303 How I did it This PR updates 3 things: - Updated bcm file for optimal MMU settings. - Updated buffer defaults to accommodate the TH5 architecture with 1 ingress pool + 1 egress pool and updated to optimal value. - Updated PG lookups for buffer setups. How to verify it Tested with sonic-mgmt tests with xoff/xon tests with updated QoS parameter: https://github.com/sonic-net/sonic-mgmt/pull/13656/files Local ixia test is passing in lab. Both verified using 202311 branch for backporting.

bingwang-ms · 2024-08-02T21:58:18Z

@r12f Please file another PR for 202405 branch to address cherry-pick conflict.

Signed-off-by: Janetxxx <[email protected]>

* solve conflict in #19570 Signed-off-by: Janetxxx <[email protected]>

Update Arista7060X6-PE 256x200G mmu configuration.

eef3ab1

r12f requested a review from aaronpayment July 14, 2024 22:35

r12f added Platform: Arista Request for 202311 Branch Request for 202405 Branch labels Jul 14, 2024

mssonicbld added the Cherry Pick Conflict_202405 label Jul 14, 2024

lguohan reviewed Jul 15, 2024

View reviewed changes

lguohan added the Approved for 202311 Branch label Jul 15, 2024

Update MMU configurations.

5e0923a

Update MMU configuration.

b62e111

rick-arista reviewed Jul 16, 2024

View reviewed changes

lguohan approved these changes Jul 17, 2024

View reviewed changes

lguohan merged commit 68136cb into sonic-net:master Jul 17, 2024
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mssonicbld mentioned this pull request Jul 17, 2024

[action] [PR:19570] [Arista]: Update Arista7060X6-PE 256x200G mmu configuration. (#19570) #19604

Merged

mssonicbld added the Created PR to 202311 Branch label Jul 17, 2024

mssonicbld added Included in 202311 Branch and removed Created PR to 202311 Branch labels Jul 17, 2024

Janetxxx pushed a commit to Janetxxx/sonic-buildimage that referenced this pull request Sep 17, 2024

solve conflict in sonic-net#19570

5e4f96a

Signed-off-by: Janetxxx <[email protected]>

Janetxxx mentioned this pull request Sep 17, 2024

Update Arista7060X6-PE 256x200G mmu configuration #20278

Merged

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bingwang-ms pushed a commit that referenced this pull request Sep 18, 2024

Update Arista7060X6-PE 256x200G mmu configuration (#20278)

b36ecbb

* solve conflict in #19570 Signed-off-by: Janetxxx <[email protected]>

Janetxxx added the Included in 202405 Branch label Sep 18, 2024

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Update Arista7060X6-PE 256x200G mmu configuration. #19570

Update Arista7060X6-PE 256x200G mmu configuration. #19570

r12f commented Jul 14, 2024 •

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bingwang-ms commented Aug 2, 2024

Update Arista7060X6-PE 256x200G mmu configuration. #19570

Update Arista7060X6-PE 256x200G mmu configuration. #19570

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r12f commented Jul 14, 2024 • edited Loading

Why I did it

Work item tracking

How I did it

How to verify it

Which release branch to backport (provide reason below if selected)

Tested branch (Please provide the tested image version)

Description for the changelog

Link to config_db schema for YANG module changes

A picture of a cute animal (not mandatory but encouraged)

r12f commented Jul 15, 2024

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