[fib_test]: Add t1-64-lag src_ports in FIB test (#497)

sonic-net · Mar 9, 2018 · 08cfbe8 · 08cfbe8
1 parent ea5d0bc
commit 08cfbe8
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/ansible/roles/test/files/ptftests/fib_test.py b/ansible/roles/test/files/ptftests/fib_test.py
@@ -96,6 +96,8 @@ def setUp(self):
 
         if self.test_params['testbed_type'] == 't1' or self.test_params['testbed_type'] == 't1-lag':
             self.src_ports = range(0, 32)
+        if self.test_params['testbed_type'] == 't1-64-lag':
+            self.src_ports = [0, 1, 4, 5, 16, 17, 20, 21, 34, 36, 37, 38, 39, 42, 44, 45, 46, 47, 50, 52, 53, 54, 55, 58, 60, 61, 62, 63]
         if self.test_params['testbed_type'] == 't0':
             self.src_ports = range(1, 25) + range(28, 32)
         if self.test_params['testbed_type'] == 't0-64':