fix test

Signed-off-by: Takeshi Yoneda <[email protected]>
tetratelabs · Jul 10, 2024 · d0e377f · d0e377f
1 parent cef1fd7
commit d0e377f
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Showing 7 changed files with 122 additions and 104 deletions.
diff --git a/internal/engine/wazevo/backend/isa/amd64/lower_mem.go b/internal/engine/wazevo/backend/isa/amd64/lower_mem.go
@@ -131,8 +131,8 @@ func (m *machine) lowerAddendsToAmode(x, y addend, offBase uint32) *amode {
 }
 
 func (m *machine) lowerAddend(x *backend.SSAValueDefinition) addend {
-	if x.IsFromBlockParam() {
-		return addend{x.BlkParamVReg, 0, 0}
+	if !x.IsFromInstr() {
+		return addend{m.c.VRegOf(x.V), 0, 0}
 	}
 	// Ensure the addend is not referenced in multiple places; we will discard nested Iadds.
 	op := m.c.MatchInstrOneOf(x, addendsMatchOpcodes[:])

diff --git a/internal/engine/wazevo/backend/isa/amd64/lower_mem_test.go b/internal/engine/wazevo/backend/isa/amd64/lower_mem_test.go
@@ -53,7 +53,8 @@ func TestMachine_lowerToAddressMode(t *testing.T) {
 				ptr = iadd.Return()
 				offset = 3
 				ctx.definitions[iconst1.Return()] = &backend.SSAValueDefinition{Instr: iconst1}
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlockParamValue: p, BlkParamVReg: raxVReg}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				ctx.definitions[ptr] = &backend.SSAValueDefinition{Instr: iadd}
 				return
 			},
@@ -67,8 +68,10 @@ func TestMachine_lowerToAddressMode(t *testing.T) {
 				iadd := b.AllocateInstruction().AsIadd(p1, p2).Insert(b)
 				ptr = iadd.Return()
 				offset = 3
-				ctx.definitions[p1] = &backend.SSAValueDefinition{BlockParamValue: p1, BlkParamVReg: raxVReg}
-				ctx.definitions[p2] = &backend.SSAValueDefinition{BlockParamValue: p2, BlkParamVReg: rcxVReg}
+				ctx.vRegMap[p1] = raxVReg
+				ctx.definitions[p1] = &backend.SSAValueDefinition{V: p1}
+				ctx.vRegMap[p2] = rcxVReg
+				ctx.definitions[p2] = &backend.SSAValueDefinition{V: p2}
 				ctx.definitions[ptr] = &backend.SSAValueDefinition{Instr: iadd}
 				return
 			},
@@ -79,7 +82,8 @@ func TestMachine_lowerToAddressMode(t *testing.T) {
 			in: func(ctx *mockCompiler, b ssa.Builder, m *machine) (ptr ssa.Value, offset uint32) {
 				ptr = b.CurrentBlock().AddParam(b, ssa.TypeI64)
 				offset = 1 << 31
-				ctx.definitions[ptr] = &backend.SSAValueDefinition{BlockParamValue: ptr, BlkParamVReg: raxVReg}
+				ctx.vRegMap[ptr] = raxVReg
+				ctx.definitions[ptr] = &backend.SSAValueDefinition{V: ptr}
 				return
 			},
 			insts: []string{
@@ -109,7 +113,8 @@ func TestMachine_lowerToAddressMode(t *testing.T) {
 				p := b.CurrentBlock().AddParam(b, ssa.TypeI64)
 				iconst64 := b.AllocateInstruction().AsIconst64(2).Insert(b)
 				ishl := b.AllocateInstruction().AsIshl(p, iconst64.Return()).Insert(b)
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlockParamValue: p, BlkParamVReg: raxVReg}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				ctx.definitions[iconst64.Return()] = &backend.SSAValueDefinition{Instr: iconst64}
 				ctx.definitions[ishl.Return()] = &backend.SSAValueDefinition{Instr: ishl}
 				return ishl.Return(), 1 << 30
@@ -127,8 +132,10 @@ func TestMachine_lowerToAddressMode(t *testing.T) {
 				const2 := b.AllocateInstruction().AsIconst64(2).Insert(b)
 				ishl := b.AllocateInstruction().AsIshl(p1, const2.Return()).Insert(b)
 				iadd := b.AllocateInstruction().AsIadd(p2, ishl.Return()).Insert(b)
-				ctx.definitions[p1] = &backend.SSAValueDefinition{BlockParamValue: p1, BlkParamVReg: raxVReg}
-				ctx.definitions[p2] = &backend.SSAValueDefinition{BlockParamValue: p2, BlkParamVReg: rcxVReg}
+				ctx.vRegMap[p1] = raxVReg
+				ctx.definitions[p1] = &backend.SSAValueDefinition{V: p1}
+				ctx.vRegMap[p2] = rcxVReg
+				ctx.definitions[p2] = &backend.SSAValueDefinition{V: p2}
 				ctx.definitions[const2.Return()] = &backend.SSAValueDefinition{Instr: const2}
 				ctx.definitions[ishl.Return()] = &backend.SSAValueDefinition{Instr: ishl}
 				ctx.definitions[iadd.Return()] = &backend.SSAValueDefinition{Instr: iadd}
@@ -181,7 +188,8 @@ func TestMachine_lowerAddendFromInstr(t *testing.T) {
 			name: "uextend const64",
 			in: func(ctx *mockCompiler, b ssa.Builder, m *machine) *ssa.Instruction {
 				p := b.CurrentBlock().AddParam(b, ssa.TypeI32)
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlkParamVReg: raxVReg, BlockParamValue: p}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				return b.AllocateInstruction().AsUExtend(p, 32, 64).Insert(b)
 			},
 			exp: addend{raxVReg, 0, 0},
@@ -190,7 +198,8 @@ func TestMachine_lowerAddendFromInstr(t *testing.T) {
 			name: "uextend param i32",
 			in: func(ctx *mockCompiler, b ssa.Builder, m *machine) *ssa.Instruction {
 				p := b.CurrentBlock().AddParam(b, ssa.TypeI32)
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlkParamVReg: raxVReg, BlockParamValue: p}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				return b.AllocateInstruction().AsUExtend(p, 32, 64).Insert(b)
 			},
 			exp: addend{raxVReg, 0, 0},
@@ -208,7 +217,8 @@ func TestMachine_lowerAddendFromInstr(t *testing.T) {
 			name: "sextend const64",
 			in: func(ctx *mockCompiler, b ssa.Builder, m *machine) *ssa.Instruction {
 				p := b.CurrentBlock().AddParam(b, ssa.TypeI32)
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlkParamVReg: raxVReg, BlockParamValue: p}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				return b.AllocateInstruction().AsSExtend(p, 32, 64).Insert(b)
 			},
 			exp: addend{raxVReg, 0, 0},
@@ -217,7 +227,8 @@ func TestMachine_lowerAddendFromInstr(t *testing.T) {
 			name: "sextend param i32",
 			in: func(ctx *mockCompiler, b ssa.Builder, m *machine) *ssa.Instruction {
 				p := b.CurrentBlock().AddParam(b, ssa.TypeI32)
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlkParamVReg: raxVReg, BlockParamValue: p}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				return b.AllocateInstruction().AsSExtend(p, 32, 64).Insert(b)
 			},
 			exp: addend{raxVReg, 0, 0},

diff --git a/internal/engine/wazevo/backend/isa/amd64/machine_test.go b/internal/engine/wazevo/backend/isa/amd64/machine_test.go
@@ -46,7 +46,8 @@ func TestMachine_getOperand_Reg(t *testing.T) {
 		{
 			name: "block param",
 			setup: func(ctx *mockCompiler, builder ssa.Builder, m *machine) *backend.SSAValueDefinition {
-				return &backend.SSAValueDefinition{BlkParamVReg: raxVReg, Instr: nil, N: 0}
+				ctx.vRegMap[1234] = raxVReg
+				return &backend.SSAValueDefinition{V: 1234, Instr: nil}
 			},
 			exp: newOperandReg(raxVReg),
 		},
@@ -58,7 +59,7 @@ func TestMachine_getOperand_Reg(t *testing.T) {
 				instr.AsIconst32(0xf00000f)
 				builder.InsertInstruction(instr)
 				ctx.vRegCounter = 99
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			exp:          newOperandReg(regalloc.VReg(100).SetRegType(regalloc.RegTypeInt)),
 			instructions: []string{"movl $251658255, %r100d?"},
@@ -73,7 +74,7 @@ func TestMachine_getOperand_Reg(t *testing.T) {
 				builder.InsertInstruction(c)
 				r := c.Return()
 				ctx.vRegMap[r] = regalloc.VReg(50)
-				return &backend.SSAValueDefinition{Instr: c, N: 0}
+				return &backend.SSAValueDefinition{V: r}
 			},
 			exp: newOperandReg(regalloc.VReg(50)),
 		},
@@ -87,7 +88,7 @@ func TestMachine_getOperand_Reg(t *testing.T) {
 				builder.InsertInstruction(c)
 				_, rs := c.Returns()
 				ctx.vRegMap[rs[1]] = regalloc.VReg(50)
-				return &backend.SSAValueDefinition{Instr: c, N: 2}
+				return &backend.SSAValueDefinition{V: rs[1]}
 			},
 			exp: newOperandReg(regalloc.VReg(50)),
 		},
@@ -112,7 +113,8 @@ func TestMachine_getOperand_Imm32_Reg(t *testing.T) {
 		{
 			name: "block param falls back to getOperand_Reg",
 			setup: func(ctx *mockCompiler, builder ssa.Builder, m *machine) *backend.SSAValueDefinition {
-				return &backend.SSAValueDefinition{BlkParamVReg: raxVReg, Instr: nil, N: 0}
+				ctx.vRegMap[1234] = raxVReg
+				return &backend.SSAValueDefinition{V: 1234, Instr: nil}
 			},
 			exp: newOperandReg(raxVReg),
 		},
@@ -124,7 +126,7 @@ func TestMachine_getOperand_Imm32_Reg(t *testing.T) {
 				builder.InsertInstruction(instr)
 				ctx.vRegCounter = 99
 				ctx.currentGID = 0xff // const can be merged anytime, regardless of the group id.
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			exp: newOperandImm32(0xf00000f),
 		},
@@ -155,7 +157,8 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 		{
 			name: "block param falls back to getOperand_Imm32_Reg",
 			setup: func(ctx *mockCompiler, builder ssa.Builder, m *machine) *backend.SSAValueDefinition {
-				return &backend.SSAValueDefinition{BlkParamVReg: raxVReg, Instr: nil, N: 0}
+				ctx.vRegMap[1234] = raxVReg
+				return &backend.SSAValueDefinition{V: 1234, Instr: nil}
 			},
 			exp: newOperandReg(raxVReg),
 		},
@@ -164,10 +167,11 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 			setup: func(ctx *mockCompiler, builder ssa.Builder, m *machine) *backend.SSAValueDefinition {
 				blk := builder.CurrentBlock()
 				ptr := blk.AddParam(builder, ssa.TypeI64)
-				ctx.definitions[ptr] = &backend.SSAValueDefinition{BlockParamValue: ptr, BlkParamVReg: raxVReg}
+				ctx.vRegMap[ptr] = raxVReg
+				ctx.definitions[ptr] = &backend.SSAValueDefinition{V: ptr}
 				instr := builder.AllocateInstruction()
 				instr.AsLoad(ptr, 123, ssa.TypeI64).Insert(builder)
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			exp: newOperandMem(newAmodeImmReg(123, raxVReg)),
 		},
@@ -178,7 +182,7 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 				instr := builder.AllocateInstruction()
 				instr.AsLoad(iconst.Return(), 123, ssa.TypeI64).Insert(builder)
 				ctx.definitions[iconst.Return()] = &backend.SSAValueDefinition{Instr: iconst}
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			instructions: []string{
 				"movabsq $579, %r1?", // r1 := 123+456
@@ -197,7 +201,7 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 				ctx.definitions[uextend.Return()] = &backend.SSAValueDefinition{Instr: uextend}
 				ctx.definitions[iconst.Return()] = &backend.SSAValueDefinition{Instr: iconst}
 
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			instructions: []string{
 				fmt.Sprintf("movabsq $%d, %%r1?", 0xffffff+123),
@@ -216,7 +220,7 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 				ctx.definitions[uextend.Return()] = &backend.SSAValueDefinition{Instr: uextend}
 				ctx.definitions[iconst.Return()] = &backend.SSAValueDefinition{Instr: iconst}
 
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			instructions: []string{
 				fmt.Sprintf("movabsq $%d, %%r1?", 456+123),
@@ -233,11 +237,12 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 				instr := builder.AllocateInstruction()
 				instr.AsLoad(iadd.Return(), 789, ssa.TypeI64).Insert(builder)
 
-				ctx.definitions[p] = &backend.SSAValueDefinition{BlockParamValue: p, BlkParamVReg: raxVReg}
+				ctx.vRegMap[p] = raxVReg
+				ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 				ctx.definitions[iconst.Return()] = &backend.SSAValueDefinition{Instr: iconst}
 				ctx.definitions[iadd.Return()] = &backend.SSAValueDefinition{Instr: iadd}
 
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			exp: newOperandMem(newAmodeImmReg(456+789, raxVReg)),
 		},
@@ -255,7 +260,7 @@ func Test_machine_getOperand_Mem_Imm32_Reg(t *testing.T) {
 				ctx.definitions[iconst2.Return()] = &backend.SSAValueDefinition{Instr: iconst2}
 				ctx.definitions[iadd.Return()] = &backend.SSAValueDefinition{Instr: iadd}
 
-				return &backend.SSAValueDefinition{Instr: instr, N: 0}
+				return &backend.SSAValueDefinition{Instr: instr}
 			},
 			instructions: []string{
 				fmt.Sprintf("movabsq $%d, %%r1?", 123+456+789),
@@ -361,7 +366,8 @@ L2:
 			p := b.CurrentBlock().AddParam(b, tc.typ)
 			m.cpuFeatures = tc.cpuFlags
 
-			ctx.definitions[p] = &backend.SSAValueDefinition{BlockParamValue: p, BlkParamVReg: raxVReg}
+			ctx.vRegMap[p] = raxVReg
+			ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 			ctx.vRegMap[0] = rcxVReg
 			instr := &ssa.Instruction{}
 			instr.AsClz(p)
@@ -434,7 +440,8 @@ L2:
 			p := b.CurrentBlock().AddParam(b, tc.typ)
 			m.cpuFeatures = tc.cpuFlags
 
-			ctx.definitions[p] = &backend.SSAValueDefinition{BlockParamValue: p, BlkParamVReg: raxVReg}
+			ctx.vRegMap[p] = raxVReg
+			ctx.definitions[p] = &backend.SSAValueDefinition{V: p}
 			ctx.vRegMap[0] = rcxVReg
 			instr := &ssa.Instruction{}
 			instr.AsCtz(p)

diff --git a/internal/engine/wazevo/backend/isa/amd64/operands.go b/internal/engine/wazevo/backend/isa/amd64/operands.go
@@ -253,11 +253,11 @@ func (a *amode) String() string {
 }
 
 func (m *machine) getOperand_Mem_Reg(def *backend.SSAValueDefinition) (op operand) {
-	if def.IsFromBlockParam() {
-		return newOperandReg(def.BlkParamVReg)
+	if !def.IsFromInstr() {
+		return newOperandReg(m.c.VRegOf(def.V))
 	}
 
-	if def.SSAValue().Type() == ssa.TypeV128 {
+	if def.V.Type() == ssa.TypeV128 {
 		// SIMD instructions require strict memory alignment, so we don't support the memory operand for V128 at the moment.
 		return m.getOperand_Reg(def)
 	}
@@ -273,8 +273,8 @@ func (m *machine) getOperand_Mem_Reg(def *backend.SSAValueDefinition) (op operan
 }
 
 func (m *machine) getOperand_Mem_Imm32_Reg(def *backend.SSAValueDefinition) (op operand) {
-	if def.IsFromBlockParam() {
-		return newOperandReg(def.BlkParamVReg)
+	if !def.IsFromInstr() {
+		return newOperandReg(m.c.VRegOf(def.V))
 	}
 
 	if m.c.MatchInstr(def, ssa.OpcodeLoad) {
@@ -288,8 +288,8 @@ func (m *machine) getOperand_Mem_Imm32_Reg(def *backend.SSAValueDefinition) (op
 }
 
 func (m *machine) getOperand_Imm32_Reg(def *backend.SSAValueDefinition) (op operand) {
-	if def.IsFromBlockParam() {
-		return newOperandReg(def.BlkParamVReg)
+	if !def.IsFromInstr() {
+		return newOperandReg(m.c.VRegOf(def.V))
 	}
 
 	instr := def.Instr
@@ -325,22 +325,12 @@ func asImm32(val uint64, allowSignExt bool) (uint32, bool) {
 
 func (m *machine) getOperand_Reg(def *backend.SSAValueDefinition) (op operand) {
 	var v regalloc.VReg
-	if def.IsFromBlockParam() {
-		v = def.BlkParamVReg
+	if instr := def.Instr; instr != nil && instr.Constant() {
+		// We inline all the constant instructions so that we could reduce the register usage.
+		v = m.lowerConstant(instr)
+		instr.MarkLowered()
 	} else {
-		instr := def.Instr
-		if instr.Constant() {
-			// We inline all the constant instructions so that we could reduce the register usage.
-			v = m.lowerConstant(instr)
-			instr.MarkLowered()
-		} else {
-			if n := def.N; n == 0 {
-				v = m.c.VRegOf(instr.Return())
-			} else {
-				_, rs := instr.Returns()
-				v = m.c.VRegOf(rs[n-1])
-			}
-		}
+		v = m.c.VRegOf(def.V)
 	}
 	return newOperandReg(v)
 }