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scripts: Add Renode emulation support. #127

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merged 2 commits into from
May 31, 2019

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mateusz-holenko
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This adds support for running LiteX in Renode emulation framework.

@mithro
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mithro commented Apr 25, 2019

The conda issue should be fixed by #129

futaris pushed a commit to futaris/litex-buildenv that referenced this pull request Apr 25, 2019
 * litedram changed from 30d9a3e to bc6a3f2
    * bc6a3f2 - examples/sim/sim/py: remove apb interface <Florent Kermarrec>
    * e7e4bc5 - examples/sim: add ddr3 micron model <Florent Kermarrec>
    * f219693 - examples: add simulation <Florent Kermarrec>

 * litepcie changed from 48f662e to dddd3b1
    * dddd3b1 - phy/s7pciephy: fix soft reset by reseting pcie on cd reset <Florent Kermarrec>

 * litevideo changed from 13d85a1 to 0993a4e
    * 0993a4e - Merge pull request timvideos#21 from felixheld/licensefix <Tim Ansell>
    * d8287db - LICENSE: use right project name <Felix Held>

 * litex changed from bc173380 to ab799f7b
    *   ab799f7b - Merge pull request timvideos#127 from cr1901/picorv32-data <Tim Ansell>
    |\
    | * 89c70218 - libbase/crt0-picorv32: Add support for .data sections. <William D. Jones>
    |/
    * 80bdae0e - build/sim/verilator: add trace parameter to enable tracer <Florent Kermarrec>
    * 7359a99b - soc_core: convert cpu_type="None" string to None <Florent Kermarrec>
    * 5805d630 - build/microsemi/libero_soc: only associate timings constraint to timing check (otherwise we loose io constraints...), use default settings for place & route <Florent Kermarrec>
    * 85f76662 - build/microsemi/common: add async reset synchronizer (using DFN1P0) <Florent Kermarrec>
    * e3c6bd58 - build/microsemi/libero_soc: pass timing constraints to synthesis, place & route and timing verification tools <Florent Kermarrec>
    * 4c966114 - build/microsemi/libero_soc: add timing constraints support <Florent Kermarrec>
    * 60faae49 - boards/platforms/avalanche: fix swapped serial pins <Florent Kermarrec>
    * 52396add - boards/platforms/avalanche: rename rst to rst_n (active low reset) <Florent Kermarrec>
    * 8e07e1a0 - build/microsemi/libero_soc: associate .pdc to place and route tool. <Florent Kermarrec>
    * 5137c2bf - test/test_targets: update <Florent Kermarrec>
    * a5ed42ec - soc/interconnect/stream: add Gearbox <Florent Kermarrec>
    * 11d536dc - test: remove test_bitslip (integrated in migen) <Florent Kermarrec>
    * a25645af - utils: add litex_read_verilog utility <Florent Kermarrec>
    * a538d362 - create utils directory and move the litex utils to it <Florent Kermarrec>
    * 45ec78e9 - build/microsemi/libero_soc: able to generate design script (tcl) and design constraint (pdc) for libero soc / avalanche board. <Florent Kermarrec>
    * 4cb6583b - build: add microsemi template for polarfire fpgas support <Florent Kermarrec>

 * migen changed from 0.6.dev-209-gc285c12 to 0.6.dev-211-g022721a
    * 022721a - lattice/diamond: Support sourcing by default. <William D. Jones>
    * 17e6d34 - fix yosys commands for build_names other than 'top' <Erin Moon>

Full submodule status
--
 5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD)
 a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD)
 bc6a3f220a16fbc1208cc23ab5cf072d2b81f62e litedram (remotes/origin/HEAD)
 52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
 dddd3b16edfc9b345526f4106954b2c6b6f00933 litepcie (remotes/origin/HEAD)
 b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD)
 1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD)
 0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD)
 0993a4e0422454e522e1d2b491837034b8dcccbe litevideo (remotes/origin/HEAD)
 ab799f7bd7e0ad2063747dc6636de61225e648c4 litex (remotes/origin/HEAD)
 022721a81d274a08ccb1b1f7919d4940cce99a73 migen (0.6.dev-211-g022721a)
@futaris
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futaris commented Apr 26, 2019

Not sure that litex_picorv32 external interrupts are hooked up correctly, particularly for TARGET=base

export CPU=picorv32 PLATFORM=arty TARGET=net
source ./scripts/enter-env.sh
./scripts/build/renode.sh

works

export CPU=picorv32 PLATFORM=arty TARGET=base
source ./scripts/enter-env.sh
./scripts/build/renode.sh

hangs

It also hangs if you remove the eth node from /opt/renode/platforms/cpus/litex_picorv32.repl ...

@mithro
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mithro commented Apr 26, 2019

You'll need to rebase to make Travis work.

@mateusz-holenko
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mateusz-holenko commented Apr 26, 2019

Not sure that litex_picorv32 external interrupts are hooked up correctly, particularly for TARGET=base

export CPU=picorv32 PLATFORM=arty TARGET=net
source ./scripts/enter-env.sh
./scripts/build/renode.sh

works

It works only partially as you can't write on UART.

export CPU=picorv32 PLATFORM=arty TARGET=base
source ./scripts/enter-env.sh
./scripts/build/renode.sh

hangs

It also hangs if you remove the eth node from /opt/renode/platforms/cpus/litex_picorv32.repl ...

I verified the irq mapping in platforms/cpus/litex_picorv32.repl and you are right, it's not compatible with the defaults generated by LiteX, but...

I believe that there is a problem with overlapping interrupts in LiteX + PicoRV32.
LiteX uses IRQ1 for timer, but in PicoRV32 external IRQ1 is shared with internal ecall/ebreak/illegal instruction.
This caused problems when I was working on Zephyr, so I modified LiteX to use different set of IRQs for PicoRV32.
The problem was I hadn't created any PR with the change in LiteX, but published the non-standard mapping in Renode.

To sort it out, I've just crated a PR in LiteX.

There is an issue though, BuildEnv provides its own mapping of peripheral's IRQs and for modified LiteX there is a conflict in targets/arty/net.py (and possibly other files as well).
I fixed it locally by changing ethmac IRQ to 6 (and this is the value in Renode's repl file), but I expect more fixes are needed to make it right.

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mithro commented Apr 26, 2019

I rebased this onto master to get travis to run.

@futaris
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futaris commented Apr 26, 2019

enjoy-digital/litex#174 for the issue mentioned above.

scripts/build-renode.sh Outdated Show resolved Hide resolved
scripts/build-renode.sh Outdated Show resolved Hide resolved
@pgielda
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pgielda commented May 3, 2019

I did some tests.
I would suggest adding two things:

  1. Silencing SDRAM_CONTROLLER reads/writes so that the console is not flooded.
  2. add "showAnalyzer uart Renode.Analyzers.LoggingUartAnalyzer" so that console output is printed with the rest of the log

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pgielda commented May 4, 2019

We should also tag this peripheral:

02:17:37.1529 [WARNING] sysbus: [cpu: 0xC50] WriteDoubleWord to non existing peripheral at 0xE0005804, value 0x1.
02:17:37.1529 [WARNING] sysbus: [cpu: 0xC54] WriteDoubleWord to non existing peripheral at 0xE0005808, value 0x1.
02:17:37.1530 [WARNING] sysbus: [cpu: 0xC58] WriteDoubleWord to non existing peripheral at 0xE0005810, value 0x1.
02:17:37.1531 [WARNING] sysbus: [cpu: 0xC60] WriteDoubleWord to non existing peripheral at 0xE0005804, value 0x2.
02:17:37.1532 [WARNING] sysbus: [cpu: 0xC64] WriteDoubleWord to non existing peripheral at 0xE0005808, value 0x1.
02:17:37.1532 [WARNING] sysbus: [cpu: 0xC6C] WriteDoubleWord to non existing peripheral at 0xE0005810, value 0x1.

And most probably silence this too.

@mateusz-holenko mateusz-holenko force-pushed the renode_target branch 3 times, most recently from 43ebaad to cff07c1 Compare May 7, 2019 14:32
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In the newest version:

  • if Renode is not found in the system, version 1.7 is downloaded from github and copied to build/renode directory

  • platform definition file is generated dynamically from csr.h and mem.h files

  • access to some peripherals is silenced (so it does not flood the console)

  • uart output is logged

scripts/build-renode.sh Outdated Show resolved Hide resolved

RENODE_BIN="renode"
command -v $RENODE_BIN 2>&1 1>/dev/null
if [ $? -ne 0 ]; then
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Please add a comment here. I'm assuming this is downloading a prebuilt renode release? On what platforms will this run?

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You are right, this is a pre-built Renode compiled for 64-bit Linux. It should run on any distro assuming dependencies are present in the system (list of runtime dependecies is described here.

Other option is to install package (that would take care of dependencies automatically). The downside is that:

  • it's installed globally in the system, polluting it a little bit,
  • packages are distro-specific and we currently support: debian/ubuntu, fedora and arch so we would have to detect the distribution and install appropriate package; the question what about other distributions?

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I was also wondering if downloading/installing Renode shouldn't be done in download-env.sh script.

The question is: can I determine if it's needed? I wouldn't like to download it if the user does not intend to run emulation.

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todo bot commented May 8, 2019

this value is hardcoded, as I couldn't find it in the csv

# TODO: this value is hardcoded, as I couldn't find it in the csv
base = 0x20228000
return [
'boot_flash: Memory.ArrayMemory @ sysbus {}'.format(base),
' size: 0x00100000'
]


This comment was generated by todo based on a TODO comment in a20675d in #127. cc @antmicro.

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todo bot commented May 8, 2019

where should this script be located?

# TODO: where should this script be located?
python $SCRIPT_DIR/generate-renode-scripts.py $LITEX_CONFIG_FILE \
--repl $platform_file \
--resc $script_file \
--firmware-binary "$TARGET_BUILD_DIR/software/$FIRMWARE/firmware.bin" \
--bios-binary "$TARGET_BUILD_DIR/software/bios/bios.bin" \


This comment was generated by todo based on a TODO comment in 2de42cc in #127. cc @antmicro.

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todo bot commented May 8, 2019

this value is hardcoded, as I couldn't find it in the csv

# TODO: this value is hardcoded, as I couldn't find it in the csv
base = 0x20228000
return [
'boot_flash: Memory.ArrayMemory @ sysbus {}'.format(base),
' size: 0x00100000'
]


This comment was generated by todo based on a TODO comment in 2de42cc in #127. cc @antmicro.

make firmware
fi

function parse_generated_header {
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This is trying to get the IP address right? I would suggest we use the following name...

Suggested change
function parse_generated_header {
function get_ethernet_ip_address {

This is probably useful in the qemu emulation too. We should do that there too?

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Before moving to a python script this function was used to extract different values defined in mem.h/csr.h files. Right now it's used in just one context, so it lost its universality - refactoring and renaming it seems like a good idea.

The whole tap-related fragment of script is a copy-paste from build-qemu.sh, so the two scripts shares a lot more code. I will extract it to some base file and source in both build-renode.sh and build-qemu.sh.

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After extracting the common function to build-common.sh it turns out that parse_generated_header function might be used in build-qemu in several places (in different context), so I kept it's name.

fi

script_file=$(mktemp /tmp/litex_buildenv.resc.XXXXXX)
platform_file=$(mktemp /tmp/litex_buildenv.repl.XXXXXX)
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Lets put these files in the build directory under build/<build directory>/renode?

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We then don't need to clean them up and people can launch renode manually with the configurations.

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This is a good idea.

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It's done.

@@ -0,0 +1,168 @@
#!/usr/bin/env python3

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Please add top level doc string.

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Done.

import zlib
import argparse

def generate_ethmac(data):
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Please add docstring and maybe type hints.

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I added docstrings to all functions.

buffer_size = get_entry_value(data, 'memory_region', 'ethmac', 1)
interrupt = get_entry_value(data, 'constant', 'ethmac_interrupt')

result = [
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Use a triple quoted string for long output like this.

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This is reworked to return a single, multiline string.

base = 0x20228000
return [
'boot_flash: Memory.ArrayMemory @ sysbus {}'.format(base),
' size: 0x00100000'
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The size / base comes from mem.h in build/XXXX/software/include/generated/

#define SPIFLASH_BASE 0xa0000000
#define SPIFLASH_SIZE 0x01000000

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This is actually in the CSV file in build/XXX/test/csr.csv too;

memory_region,rom,0x00000000,32768,
memory_region,sram,0x10000000,32768,
memory_region,spiflash,0xa0000000,16777216,
memory_region,main_ram,0x40000000,268435456,
memory_region,ethmac,0xb0000000,8192,

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I was confused by the fact that in include/generated/mem.h FLASH_BOOT_ADDRESS is defined as 0x20228000, but spiflash is located at 0xa0000000.

Now I see in targets/arty/base.py that this address is a default shadow for 0x20000000.
For Arty platform, the flash boot address is spi_flash base + gateware size (0x220000) + bios size (0x8000), so it all adds up.

It's still a bit problematic, as needed parameters (information about shadow address, gateware size or bios size) are not included in csr.csv so I don't see a way of calculating the final value based solely on this input.

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I looked a little in LiteX sources and it looks that the best option is to emit more information (i.e., shadow_base and flash_boot_offset) to csr.csv file.

As it will require a separate PR to LiteX that would block this one, I decided to temporarily remove the functionality of booting from flash (still leaving a netboot option available). I will add it with a separate PR, once the necessary code is in LiteX.


def generate_repl(data):
return \
generate_cpu(data) + \
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Don't use line continuations like this;

def generate_repl(data):
 output = []
 output += generate_cpu(data)
 output += xxx
 return "".join(output)

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This fragment is totally reworked.

result.append(' -> cpu@{}'.format(interrupt))
return result

def generate_peripheral(data, name, model, properties=None):
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What if the peripheral doesn't exist?

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@mateusz-holenko mateusz-holenko May 15, 2019

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My idea was to return an empty array that would concatenate nicely (I just missed an if testing if peripheral base address is present in data), but now the generating code is totally reworked, so this is no more valid.

return \
generate_cpu(data) + \
generate_memory_region(data, 'rom') + \
generate_memory_region(data, 'sram') + \
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You should loop over the memory regions define in either mem.h or csr.csv;

data = """
memory_region,rom,0x00000000,32768,
memory_region,sram,0x10000000,32768,
memory_region,spiflash,0xa0000000,16777216,
memory_region,main_ram,0x40000000,268435456,
memory_region,ethmac,0xb0000000,8192,
"""
for line in csv.reader(data):
  if line[0] != "memory_region":
    _, memory_name, memory_start_adress, memory_size = *line
   # Some peripherals (like Ethernet) define a memory region, as peripherals will already be defined and taken ownership of the region we skip creating it here.
   if model.already_has_memory(memory_name):
      print("Skipping {} as already claimed by peripheral {}".format(memory_name, model.already_has_memory(memory_name))
      continue
    generate_memory_region(memory_name, memory_start_address, memory_size)

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I created a separate parse_csv function that does the job.

'sysbus WriteDoubleWord {} {}'.format(hex(flash_boot_address), hex(len(firmware_data))),
'sysbus WriteDoubleWord {} {}'.format(hex(flash_boot_address + 4), hex(crc32)),
'sysbus LoadBinary @{} {}'.format(firmware_binary, hex(flash_boot_address + 8))
])
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Can you add a comment about what this is doing and why?

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This fragment of code is temporarily removed. See comments above.

return None

def generate_repl(data):
return \
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You want code that does something like this;

#! /usr/bin/env python3

data = """
csr_base,cas,0xe0006800,,
csr_base,ctrl,0xe0000000,,
csr_base,ddrphy,0xe0005800,,
csr_base,ethmac,0xe0007800,,
csr_base,ethphy,0xe0007000,,
csr_base,info,0xe0006000,,
csr_base,sdram,0xe0004000,,
csr_base,spiflash,0xe0005000,,
csr_base,timer0,0xe0002800,,
csr_base,uart,0xe0001800,,
csr_base,uart_phy,0xe0001000,,
csr_base,identifier_mem,0xe0002000,,
csr_register,cas_leds_out,0xe0006800,1,rw
csr_register,cas_switches_in,0xe0006804,1,ro
csr_register,cas_buttons_ev_status,0xe0006808,1,rw
csr_register,cas_buttons_ev_pending,0xe000680c,1,rw
csr_register,cas_buttons_ev_enable,0xe0006810,1,rw
constant,remoteip1,192,,
constant,remoteip2,168,,
constant,remoteip3,100,,
constant,remoteip4,100,,
constant,cas_leds_count,4,,
constant,cas_switches_count,4,,
constant,cas_buttons_count,4,,
constant,ethmac_rx_slots,2,,
constant,ethmac_tx_slots,2,,
"""

# Build a list of peripherals and collect all CSR registers + CSR constants associated with the peripherals
global_constants = {}
peripherals = {}
for line in csv.reader(data):
    if line[0] == "csr_base":
        _, peripheral_name, peripheral_register_base = line
        assert peripheral_name not in peripherals
        registers = {}
        constants = {}
        peripherals[peripheral_name] = (peripheral_register_base, registers, constants)

    elif line[0] == "csr_register":
        _, register_name, register_address, register_width, register_mode = line
        for peripheral_name in peripherals.keys():
            if not register_name.startswith(peripheral_name):
                continue
            peripheral_register_base, peripheral_registers, _ = peripherals[peripheral_name]

            # Strip the peripheral prefix
            register_short_name = constant_name[len(peripheral_name)+1:]

            register_offset = register_address - peripheral_register_base
            assert register_short_name not in peripheral_registers
            peripheral_registers[register_name] = (register_offset, register_width, register_mode)
            break
        else:
            # CSR Registers must be associated with a peripheral
            assert False, "CSR Register {} not associated with any peripheral {}".format(register_name, peripherals.keys())

    elif line[0] == "constant":
        _, constant_name, constant_value = line
        for peripheral_name in peripherals.keys():
            if not constant_name.startswith(peripheral_name):
                continue

            # Strip the peripheral prefix
            constant_short_name = constant_name[len(peripheral_name)+1:]

            peripheral_register_base, _, peripheral_constants = peripherals[peripheral_name]
            assert constant_short_name not in peripheral_constants
            peripheral_constants[constant_short_name] = constant_value

            break
        else:
            global_constants[constant_name] = constant_value

    else:
        assert False, "Unknown line '{}'".format(line)

import pprint
pprint.pprint(global_constants)
pprint.pprint(peripherals)

for peripheral_name, (peripheral_register_base, peripheral_registers, peripheral_constants) in peripherals.values():
    peripheral_handler = detect_peripheral_handler(peripheral_registers)
    if peripheral_handler is None:
        peripheral_hanlder = mock_handler(peripheral_register_base, peripheral_registers)

    peripheral_handler(config_file, peripheral_name, peripheral_register_base, peripheral_registers, peripheral_constants)

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I created a separate parse_csv function that does the job. I skipped parsing registers as it's not needed for Renode.

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Two comments;

  • Python script could use some big improvements
  • Lets generate the renode config into the build directory (to allow people to launch renode themselves)

@mateusz-holenko
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mateusz-holenko commented May 10, 2019

Not sure that litex_picorv32 external interrupts are hooked up correctly, particularly for TARGET=base

export CPU=picorv32 PLATFORM=arty TARGET=net
source ./scripts/enter-env.sh
./scripts/build/renode.sh

works

It works only partially as you can't write on UART.

export CPU=picorv32 PLATFORM=arty TARGET=base
source ./scripts/enter-env.sh
./scripts/build/renode.sh

hangs
It also hangs if you remove the eth node from /opt/renode/platforms/cpus/litex_picorv32.repl ...

I verified the irq mapping in platforms/cpus/litex_picorv32.repl and you are right, it's not compatible with the defaults generated by LiteX, but...

I believe that there is a problem with overlapping interrupts in LiteX + PicoRV32.
LiteX uses IRQ1 for timer, but in PicoRV32 external IRQ1 is shared with internal ecall/ebreak/illegal instruction.
This caused problems when I was working on Zephyr, so I modified LiteX to use different set of IRQs for PicoRV32.
The problem was I hadn't created any PR with the change in LiteX, but published the non-standard mapping in Renode.

To sort it out, I've just crated a PR in LiteX.

There is an issue though, BuildEnv provides its own mapping of peripheral's IRQs and for modified LiteX there is a conflict in targets/arty/net.py (and possibly other files as well).
I fixed it locally by changing ethmac IRQ to 6 (and this is the value in Renode's repl file), but I expect more fixes are needed to make it right.

The ideas from my PR has been merged to LiteX master with this commit.

@mithro I see that buildenv LIteX submodule is a bit behind master. Do you know if switching to a newer version would be a problem?

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mithro commented May 10, 2019

@mateusz-holenko To update the submodules it should be as simple as going into ./third_party directory and running /merge-upstream.sh.

@mateusz-holenko mateusz-holenko force-pushed the renode_target branch 2 times, most recently from ad978b3 to 3fa14bb Compare May 15, 2019 12:29
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@mithro Did you have time to look at the current version of the script?

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I rebased the code onto the current master and changed Renode binary source to nightly builds.

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@mithro Travis failed, but it does not seem to be related to my changes. How can I force it to run once again?

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You should wrap the lines at 80 characters. Please submit another pull request doing that.

LGTM.

@mithro mithro merged commit 5c6f7e2 into timvideos:master May 31, 2019
@mateusz-holenko mateusz-holenko deleted the renode_target branch November 18, 2019 08:38
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4 participants