[REFACTOR] Code base refactoring (apache#5)

vta/Makefile

@@ -54,9 +54,13 @@ endif
 
 all: lib/libvta.$(SHARED_LIBRARY_SUFFIX)
 
-SRC = $(wildcard src/*.cc src/*.cc)
-ALL_OBJ = $(patsubst %.cc, build/%.o, $(SRC))
-ALL_DEP = $(ALL_OBJ)
+VTA_LIB_SRC = $(wildcard src/*.cc src/tvm/*.cc)
+ifeq ($(TARGET), PYNQ_TARGET)
+	VTA_LIB_SRC += $(wildcard src/pynq/*.cc)
+	LDFLAGS += -L/usr/lib -lsds_lib
+	LDFLAGS += -L/opt/python3.6/lib/python3.6/site-packages/pynq/drivers/ -l:libdma.so
+endif
+VTA_LIB_OBJ = $(patsubst %.cc, build/%.o, $(VTA_LIB_SRC))
 
 test: $(TEST)
 
@@ -65,7 +69,7 @@ build/src/%.o: src/%.cc
 	$(CXX) $(CFLAGS) -MM -MT build/src/$*.o $< >build/src/$*.d
 	$(CXX) -c $(CFLAGS) -c $< -o $@
 
-lib/libvta.$(SHARED_LIBRARY_SUFFIX): $(ALL_DEP)
+lib/libvta.$(SHARED_LIBRARY_SUFFIX): $(VTA_LIB_OBJ)
 	@mkdir -p $(@D)
 	$(CXX) $(CFLAGS) -shared -o $@ $(filter %.o, $^) $(LDFLAGS)
 

vta/apps/pynq_rpc/start_rpc_server.sh

@@ -0,0 +1,4 @@
+#!/bin/bash
+export PYTHONPATH=${PYTHONPATH}:/home/xilinx/tvm/python
+export LD_LIBRARY_PATH=${LD_LIBRARY_PATH}:/opt/python3.6/lib/python3.6/site-packages/pynq/drivers/
+python -m  tvm.exec.rpc_server --load-library /home/xilinx/vta/lib/libvta.so

vta/hardware/vivado/Makefile

@@ -2,69 +2,38 @@
 ROOTDIR = $(CURDIR)
 BUILD_DIR = $(ROOTDIR)/build
 SCRIPT_DIR = $(ROOTDIR)/scripts
-SRC_DIR = $(ROOTDIR)/../../src/hardware/hls
+SRC_DIR = $(ROOTDIR)/src
 SIM_DIR = $(ROOTDIR)/sim
-TEST_DIR = $(ROOTDIR)/../../src/test
+TEST_DIR = $(ROOTDIR)/../../tests/hardware/common
 INCLUDE_DIR = $(ROOTDIR)/../../include
 
 # Executables
 VIVADO_HLS = vivado_hls
 VIVADO = vivado
 HSI = hsi
 
-# Build parameters:
+# Include top-level config file
+ifndef config
+ifneq ("$(wildcard ../../config.mk)", "")
+	config = ../../config.mk
+else
+	config = ../../make/config.mk
+endif
+endif
+include $(config)
+
+#---------------------
+# Compilation parameters
+#--------------------
+
 #  Number of threads during compilation
 NUM_THREADS = 8
+
 #  Target Frequency
 CLOCK_FREQ = 100
-#  Log of input width in bits
-LOG_INP_WIDTH = 3
-#  Log of weight width in bits
-LOG_WGT_WIDTH = 3
-#  Log of accum width in bits
-LOG_ACC_WIDTH = 5
-#  Log of output width in bits
-LOG_OUT_WIDTH = $(LOG_INP_WIDTH)
-#  Log of tensor batch size (A in (A,B)x(B,C) matrix multiplication)
-LOG_BATCH = 0
-#  Log of tensor inner block size (B in (A,B)x(B,C) matrix multiplication)
-LOG_IN_BLOCK = 4
-#  Log of tensor outer block size (C in (A,B)x(B,C) matrix multiplication)
-LOG_OUT_BLOCK = 4
-#  Log of uop buffer size in Bytes
-LOG_UOP_BUFF_SIZE = 15
-#  Log of inp buffer size in Bytes
-LOG_INP_BUFF_SIZE = 15
-#  Log of wgt buffer size in Bytes
-LOG_WGT_BUFF_SIZE = 15
-#  Log of acc buffer size in Bytes
-LOG_ACC_BUFF_SIZE = 17
-#  Log of out buffer size in Bytes
-LOG_OUT_BUFF_SIZE = $(shell echo "$$(( $(LOG_ACC_BUFF_SIZE)+$(LOG_OUT_WIDTH)-$(LOG_ACC_WIDTH) ))" )
 
-# Derived parameter
-#  Input width in bits
-INP_WIDTH = $(shell echo "$$(( 1 << $(LOG_INP_WIDTH) ))" )
-#  Weight width in bits
-WGT_WIDTH = $(shell echo "$$(( 1 << $(LOG_WGT_WIDTH) ))" )
-#  Output width in bits
-OUT_WIDTH = $(shell echo "$$(( 1 << $(LOG_OUT_WIDTH) ))" )
-#  Tensor batch size
-BATCH = $(shell echo "$$(( 1 << $(LOG_BATCH) ))" )
-#  Tensor outer block size
-IN_BLOCK = $(shell echo "$$(( 1 << $(LOG_IN_BLOCK) ))" )
-#  Tensor inner block size
-OUT_BLOCK = $(shell echo "$$(( 1 << $(LOG_OUT_BLOCK) ))" )
-#  Uop buffer size in Bytes
-UOP_BUFF_SIZE = $(shell echo "$$(( 1 << $(LOG_UOP_BUFF_SIZE) ))" )
-#  Inp buffer size in Bytes
-INP_BUFF_SIZE = $(shell echo "$$(( 1 << $(LOG_INP_BUFF_SIZE) ))" )
-#  Wgt buffer size in Bytes
-WGT_BUFF_SIZE = $(shell echo "$$(( 1 << $(LOG_WGT_BUFF_SIZE) ))" )
-#  Acc buffer size in Bytes
-ACC_BUFF_SIZE = $(shell echo "$$(( 1 << $(LOG_ACC_BUFF_SIZE) ))" )
-#  Out buffer size in Bytes
-OUT_BUFF_SIZE = $(shell echo "$$(( 1 << $(LOG_OUT_BUFF_SIZE) ))" )
+#  Timing closure compensation (0 for none, 3 for highest)
+TIMING_CLOSURE_COMP = 0
 
 # Derive clock target period
 TARGET_PER = $(shell echo "$$(( (1000 + $(CLOCK_FREQ) - 1) / $(CLOCK_FREQ) - 0))" )
@@ -85,7 +54,7 @@ ip:
 		$(VIVADO_HLS) -f $(SCRIPT_DIR)/hls.tcl \
 			-tclargs $(SRC_DIR) $(SIM_DIR) $(TEST_DIR) $(INCLUDE_DIR) $(TARGET_PER) \
 			$(LOG_INP_WIDTH) $(LOG_WGT_WIDTH) $(LOG_ACC_WIDTH) $(LOG_OUT_WIDTH) \
-			$(LOG_BATCH) $(LOG_OUT_BLOCK) $(LOG_IN_BLOCK) \
+			$(LOG_BATCH) $(LOG_BLOCK_OUT) $(LOG_BLOCK_IN) \
 			$(LOG_UOP_BUFF_SIZE) $(LOG_INP_BUFF_SIZE) $(LOG_WGT_BUFF_SIZE) \
 			$(LOG_ACC_BUFF_SIZE) $(LOG_OUT_BUFF_SIZE)
 

vta/hardware/vivado/scripts/hls.tcl

@@ -62,7 +62,7 @@ if { [llength $argv] eq 19 } {
 }
 
 # C define flags to pass to compiler
-set cflags "-I $include_dir -I $include_dir/hardware/hls \
+set cflags "-I $include_dir -I $src_dir -I $test_dir \
 	-DDEBUG=0 -DLOG_WGT_WIDTH=$wgt_width -DLOG_INP_WIDTH=$inp_width \
 	-DLOG_ACC_WIDTH=$acc_width -DLOG_OUT_WIDTH=$out_width \
 	-DLOG_BATCH=$batch -DLOG_BLOCK_OUT=$block_out -DLOG_BLOCK_IN=$block_in \
@@ -127,7 +127,7 @@ open_project vta_sim
 set_top vta
 add_files $src_dir/vta.cc -cflags $cflags
 add_files -tb $sim_dir/vta_test.cc -cflags $cflags
-add_files -tb $test_dir/vta_test_lib.cc -cflags $cflags
+add_files -tb $test_dir/test_lib.cc -cflags $cflags
 open_solution "solution0"
 init_design $target_period $inp_width $wgt_width $out_width $batch $block_in $block_out
 csim_design -clean

vta/hardware/vivado/sim/vta_test.cc

@@ -8,8 +8,8 @@
 #include <stdlib.h>
 #include <iostream>
 
-#include "vta.h"
-#include "vta_test_lib.h"
+#include "../src/vta.h"
+#include "../../../tests/hardware/common/test_lib.h"
 
 int main(void)
 {

vta/src/hardware/hls/vta.cc → vta/hardware/vivado/src/vta.cc

@@ -8,7 +8,7 @@
 #include <stdlib.h>
 #include <string.h>
 
-#include "vta.h"
+#include "./vta.h"
 
 void fetch (
   uint32_t insn_count,

vta/include/hardware/hls/vta.h → vta/hardware/vivado/src/vta.h

@@ -11,8 +11,88 @@
 #include <ap_int.h>
 #include <hls_stream.h>
 
-#include "vta_typedefs.h"
-#include "vta_params.h"
+#include <vta/hw_spec.h>
+
+/* \typedef uop_T Micro-op datatype*/
+typedef ap_uint<UOP_WIDTH> uop_T;
+
+/* \typedef inp_T Input datatype*/
+typedef ap_int<INP_WIDTH> inp_T;
+
+/* \typedef wgt_T Weight datatype*/
+typedef ap_int<WGT_WIDTH> wgt_T;
+
+/* \typedef out_T Output datatype*/
+typedef ap_int<OUT_WIDTH> out_T;
+
+/* \typedef acc_T Accumulator datatype*/
+typedef ap_int<ACC_WIDTH> acc_T;
+
+/* \typedef mul_T Multiplier output datatype*/
+typedef ap_int<WGT_WIDTH+INP_WIDTH+1> mul_T;
+
+/* \typedef sum_T GEMM accumulator datatype*/
+typedef ap_int<WGT_WIDTH+INP_WIDTH+LOG_BLOCK_IN+1> sum_T;
+
+/* \typedef inp_vec_T Input vector datatype*/
+typedef ap_uint<INP_WIDTH*BLOCK_IN> inp_vec_T;
+
+/* \typedef wgt_vec_T Weight vector datatype*/
+typedef ap_uint<WGT_WIDTH*BLOCK_IN> wgt_vec_T;
+
+/* \typedef acc_vec_T Accumulator vector datatype*/
+typedef ap_uint<ACC_WIDTH*BLOCK_OUT> acc_vec_T;
+
+/* \typedef out_vec_T Output vector datatype*/
+typedef ap_uint<OUT_WIDTH*BLOCK_OUT> out_vec_T;
+
+/* \typedef uop_idx_T Micro-op SRAM index datatype*/
+typedef ap_uint<LOG_UOP_BUFF_DEPTH+1> uop_idx_T;
+
+/* \typedef inp_idx_T Input SRAM index datatype*/
+typedef ap_uint<LOG_INP_BUFF_DEPTH+1> inp_idx_T;
+
+/* \typedef wgt_idx_T Weight SRAM index datatype*/
+typedef ap_uint<LOG_WGT_BUFF_DEPTH+1> wgt_idx_T;
+
+/* \typedef acc_idx_T Accumulator SRAM index datatype*/
+typedef ap_uint<LOG_ACC_BUFF_DEPTH+1> acc_idx_T;
+
+/* \typedef opcode_T Opcode datatype*/
+typedef ap_uint<OPCODE_BIT_WIDTH> opcode_T;
+
+/* \typedef insn_T Instruction datatype*/
+typedef ap_uint<INS_WIDTH> insn_T;
+
+/* \typedef loop_T Loop bound datatype*/
+typedef ap_uint<LOOP_ITER_WIDTH> loop_T;
+
+/* \typedef memop_id_T Memory operation ID datatype*/
+typedef ap_uint<MEMOP_ID_BIT_WIDTH> memop_id_T;
+
+/* \typedef memop_sram_T Memory operation SRAM index datatype*/
+typedef ap_uint<MEMOP_SRAM_ADDR_BIT_WIDTH> memop_sram_T;
+
+/* \typedef memop_dram_T Memory operation DRAM index datatype*/
+typedef ap_uint<MEMOP_DRAM_ADDR_BIT_WIDTH> memop_dram_T;
+
+/* \typedef memop_size_T Memory operation range datatype*/
+typedef ap_uint<MEMOP_SIZE_BIT_WIDTH> memop_size_T;
+
+/* \typedef memop_stride_T Memory operation stride datatype*/
+typedef ap_uint<MEMOP_STRIDE_BIT_WIDTH> memop_stride_T;
+
+/* \typedef memop_pad_T Memory operation pad width datatype*/
+typedef ap_uint<MEMOP_PAD_BIT_WIDTH> memop_pad_T;
+
+/* \typedef aluop_opcode_T ALU operation opcode datatype*/
+typedef ap_uint<ALU_OPCODE_BIT_WIDTH> aluop_opcode_T;
+
+/* \typedef aluop_opcode_T ALU operation immediate datatype*/
+typedef ap_int<ALUOP_IMM_BIT_WIDTH> aluop_imm_T;
+
+/* \typedef aluop_opcode_T ALU operation shift immediate datatype*/
+typedef ap_uint<LOG_ACC_WIDTH> aluop_sh_imm_T;
 
 /*!
 * \brief Fetch module.