Merge pull request #1912 from ucb-bar/bump-spike

Bump Spike
ucb-bar · Jun 30, 2024 · d64b47d · d64b47d
2 parents 9fad6fc + 877063c
commit d64b47d
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Showing 8 changed files with 8 additions and 9 deletions.
diff --git a/generators/chipyard/src/main/resources/csrc/spiketile.cc b/generators/chipyard/src/main/resources/csrc/spiketile.cc
@@ -462,7 +462,6 @@ chipyard_simif_t::chipyard_simif_t(size_t icache_ways,
   cfg.bootargs = nullptr;
   cfg.isa = isastr;
   cfg.priv = "MSU";
-  cfg.varch = "vlen:128,elen:64";
   cfg.misaligned = false;
   cfg.endianness = endianness_little;
   cfg.pmpregions = pmpregions;
@@ -1076,7 +1075,7 @@ void chipyard_simif_t::loadmem(size_t base, const char* fname) {
   } loadmem_memif(this, tcm_base);
 
   reg_t entry;
-  load_elf(fname, &loadmem_memif, &entry);
+  load_elf(fname, &loadmem_memif, &entry, 0);
 }
 
 bool insn_should_fence(uint64_t bits) {

diff --git a/generators/chipyard/src/main/scala/SpikeTile.scala b/generators/chipyard/src/main/scala/SpikeTile.scala
@@ -115,7 +115,7 @@ class SpikeTile(
   val masterNode = visibilityNode
   val slaveNode = TLIdentityNode()
 
-  override def isaDTS = "rv64gcv_Zfh"
+  override def isaDTS = "rv64imafdcv_zicsr_zifencei_zihpm_zvl128b_zve64d"
 
   // Required entry of CPU device in the device tree for interrupt purpose
   val cpuDevice: SimpleDevice = new SimpleDevice("cpu", Seq("ucb-bar,spike", "riscv")) {

diff --git a/generators/chipyard/src/main/scala/iobinders/IOBinders.scala b/generators/chipyard/src/main/scala/iobinders/IOBinders.scala
@@ -486,7 +486,6 @@ class WithTraceIOPunchthrough extends OverrideLazyIOBinder({
       val tiles = chipyardSystem.totalTiles.values
       val cfg = SpikeCosimConfig(
         isa = tiles.headOption.map(_.isaDTS).getOrElse(""),
-        vlen = tiles.headOption.map(_.tileParams.core.vLen).getOrElse(0),
         priv = tiles.headOption.map(t => if (t.usingUser) "MSU" else if (t.usingSupervisor) "MS" else "M").getOrElse(""),
         mem0_base = p(ExtMem).map(_.master.base).getOrElse(BigInt(0)),
         mem0_size = p(ExtMem).map(_.master.size).getOrElse(BigInt(0)),

diff --git a/generators/testchipip b/generators/testchipip
diff --git a/scripts/generate-ckpt.sh b/scripts/generate-ckpt.sh
@@ -142,7 +142,8 @@ echo "quit" >> $CMDS_FILE
 echo "spike -d --debug-cmd=$CMDS_FILE $SPIKEFLAGS $BINARY" > $SPIKECMD_FILE
 
 echo "Capturing state at checkpoint to spikeout"
-spike -d --debug-cmd=$CMDS_FILE $SPIKEFLAGS $BINARY 2> $LOADARCH_FILE
+echo $NHARTS > $LOADARCH_FILE
+spike -d --debug-cmd=$CMDS_FILE $SPIKEFLAGS $BINARY 2>> $LOADARCH_FILE
 
 
 echo "Finding tohost/fromhost in elf file"

diff --git a/sims/firesim b/sims/firesim
diff --git a/toolchains/riscv-tools/riscv-isa-sim b/toolchains/riscv-tools/riscv-isa-sim
diff --git a/toolchains/riscv-tools/riscv-spike-devices b/toolchains/riscv-tools/riscv-spike-devices