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Support Chisel6 for RTL-sim/VLSI/FPGA flows #1854
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@@ -61,8 +61,8 @@ jobs: | |||
- '**/.gitignore' | |||
- '.github/ISSUE_TEMPLATE/**' | |||
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setup-repo: | |||
name: setup-repo | |||
full-flow: |
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Why do this? I think having it in separate steps makes it easier to read in the UI and makes it clearer what to do when adding to this CI a new task/job
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I kept experiencing failures in the build caching between the two jobs. I can poke around more
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Update on this?
@@ -800,29 +777,6 @@ jobs: | |||
group-key: "group-peripherals" | |||
project-key: "chipyard-llcchiplet" | |||
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chipyard-sha3-run-tests: |
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Why are SHA3 and Mempress getting removed?
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They use too many deprecated chisel2 APIs.
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Couple of clarification Qs. Otherwise, SFTM.
@@ -61,8 +61,8 @@ jobs: | |||
- '**/.gitignore' | |||
- '.github/ISSUE_TEMPLATE/**' | |||
|
|||
setup-repo: | |||
name: setup-repo | |||
full-flow: |
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Update on this?
dsptools, rocket_dsp_utils, | ||
gemmini, icenet, tracegen, cva6, nvdla, sodor, ibex, fft_generator, | ||
constellation, mempress, barf, shuttle, caliptra_aes) |
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What's the plan to re-integrate Mempress/SHA3?
@abejgonzalez The CI failure is weird. Its like the chisel source gets corrupted between the setup-repo and dependent steps. See here: https://github.com/ucb-bar/chipyard/actions/runs/9053829746/job/24873173139 There is no plan on updating sha3. Someone interested in updating that repo is free to do so, and can open a PR reintegrating it. |
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These were serialized anyways. Breaking them into separate jobs caused transient failures.
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A more incremental approach than in #1769 .
Firesim still uses chisel3, for now. A upcoming PR will switch over firesim to chisel6 as well.
Merge after #1860
Related PRs / Issues:
Type of change:
Impact:
Contributor Checklist:
main
as the base branch?changelog:<topic>
label?changelog:
label?.conda-lock.yml
file if you updated the conda requirements file?Please Backport
?