UW Capstone project post

src/content/blog/capstone_UW_24.md

@@ -32,7 +32,7 @@ Week 3-5: Executors, metadata, and the GUI: These weeks we became accustomed wit
 Week 6-8: Testing and Refining: With the core components in place, we extended our analysis to with other Quantum Error Mitigation methods: Probabilistic Error Cancellation (PEC), Digital Dynamical Decoupling (DDD), and Readout Error Mitigation (REM).
 
 
-Week 9-10: Finalizing and Presentation In the final weeks, we added finishing touches to the pipeline and GUI and prepared for their presentations. We participated in Unitary Fund’s Quantum Wednesday and presented at a couple of our university’s poster sessions.
+Week 9-10: Finalizing and Presentation In the final weeks, we added finishing touches to the pipeline and GUI and prepared for their presentations. We participated in Unitary Fund’s Quantum Wednesday ([our presentation](https://docs.google.com/presentation/d/11FEIywpcXSVNXL2N5nLfeunERBHIylx5CP0Rcy66320/edit#slide=id.p)) and presented at a couple of our university’s poster sessions ([our poster](https://docs.google.com/presentation/d/1zMg_01GkpEG5WdwVdCubuIMgSyywb4Rp/edit#slide=id.p5)).
 
 ### Results
 In order to directly compare certain overhead parameters for each QEM technique, we ran a standardized experiment using each technique. We generated 10 mirror circuits---a type of quantum benchmarking circuit---each with fixed depth and number of shots, increasing the numbers of qubits. We used two tailored noise models run on simulators---a thermal relaxation model with an added readout error, and a depolarizing noise model with single and two-qubit errors. Prior to running any sweeps involving mitigation, we ensured that our pre-mitigated expectation values were comparable using both noise models, thus ensuring our initial results were standardized. We then ran sweeps over the circuit qubit number with error mitigation and recorded various measures of overhead required when using the mitigation. Overhead measurements included the additional number of single and two-qubit gates required, the total added circuit depth, the number of additional unique circuits needed to be run, and the additional time required to run each technique. The "no error mitigation" comparison was run on our thermal noise model. The results for the time requirements are are shown in the graphs below.