feat(rp2040): implement CMP (register) encoding T2

Still missing:

- 83 b2   uxth    r3, r0
- 50 43   muls    r0, r2
- 0b ba   rev     r3, r1

src/rp2040.spec.ts

@@ -368,6 +368,19 @@ describe('IO Register Writes', () => {
       expect(rp2040.V).toEqual(false);
     });
 
+    it('should execute an `cmp ip, r6` instruction', () => {
+      const rp2040 = new RP2040();
+      rp2040.PC = 0x10000000;
+      rp2040.flash16[0] = 0x45b4; // cmp ip (r12), r6
+      rp2040.registers[ip] = 60;
+      rp2040.registers[r6] = 56;
+      rp2040.executeInstruction();
+      expect(rp2040.N).toEqual(false);
+      expect(rp2040.Z).toEqual(false);
+      expect(rp2040.C).toEqual(true);
+      expect(rp2040.V).toEqual(false);
+    });
+
     it('should execute an `eors r1, r3` instruction', () => {
       const rp2040 = new RP2040();
       rp2040.PC = 0x10000000;

src/rp2040.ts

@@ -528,6 +528,19 @@ export class RP2040 {
       this.V =
         (leftValue > 0 && rightValue < 0 && result < 0) ||
         (leftValue < 0 && rightValue > 0 && result > 0);
+      // CMP (register) encoding T2
+    } else if (opcode >> 8 === 0b01000101) {
+      const Rm = (opcode >> 3) & 0xf;
+      const Rn = ((opcode >> 4) & 0x8) | (opcode & 0x7);
+      const leftValue = this.registers[Rn] | 0;
+      const rightValue = this.registers[Rm] | 0;
+      const result = (leftValue - rightValue) | 0;
+      this.N = leftValue < rightValue;
+      this.Z = leftValue === rightValue;
+      this.C = leftValue >= rightValue;
+      this.V =
+        (leftValue > 0 && rightValue < 0 && result < 0) ||
+        (leftValue < 0 && rightValue > 0 && result > 0);
     } else if (opcode === 0xb672) {
       console.warn('ignoring cpsid i');
     } else if (opcode === 0xb662) {