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agp/intel: Flush chipset writes after updating a single PTE
After we update one PTE for a page, the caller expects to be able to immediately use that through a GGTT read/write. To comply with the callers expectations we therefore need to flush the chipset buffers before returning. Reported-by: Matti Hämäläinen <[email protected]> Fixes: d6473f5 ("drm/i915: Add support for mapping an object page...") Signed-off-by: Chris Wilson <[email protected]> Cc: Ankitprasad Sharma <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Tested-by: Matti Hämäläinen <[email protected]> Cc: [email protected] Reviewed-by: Mika Kuoppala <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
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