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boards: qemu_cortex_r5: Add board documentation
This commit adds the board documentation to the qemu_cortex_r5 platform. Signed-off-by: Stephanos Ioannidis <[email protected]>
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.. _qemu_cortex_r5: | ||
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ARM Cortex-R5 Emulation (QEMU) | ||
############################## | ||
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Overview | ||
******** | ||
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This board configuration will use QEMU to emulate the Xilinx Zynq UltraScale+ | ||
(ZynqMP) platform. | ||
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.. figure:: qemu_cortex_r5.png | ||
:width: 600px | ||
:align: center | ||
:alt: Qemu | ||
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Qemu (Credit: qemu.org) | ||
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This configuration provides support for an ARM Cortex-R5 CPU and these devices: | ||
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* ARM PL-390 Generic Interrupt Controller | ||
* Xilinx Zynq TTC (Cadence TTC) | ||
* Xilinx Zynq UART | ||
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.. note:: | ||
This board configuration makes no claims about its suitability for use | ||
with an actual ZCU102 hardware system, or any other hardware system. | ||
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Hardware | ||
******** | ||
Supported Features | ||
================== | ||
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The following hardware features are supported: | ||
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+--------------+------------+----------------------+ | ||
| Interface | Controller | Driver/Component | | ||
+==============+============+======================+ | ||
| GIC | on-chip | generic interrupt | | ||
| | | controller | | ||
+--------------+------------+----------------------+ | ||
| TTC | on-chip | system timer | | ||
+--------------+------------+----------------------+ | ||
| UART | on-chip | serial port | | ||
+--------------+------------+----------------------+ | ||
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The kernel currently does not support other hardware features on this platform. | ||
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Devices | ||
======== | ||
System Timer | ||
------------ | ||
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This board configuration uses a system timer tick frequency of 1000 Hz. | ||
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Serial Port | ||
----------- | ||
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This board configuration uses a single serial communication channel with the | ||
on-chip UART0. | ||
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Known Problems or Limitations | ||
============================== | ||
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The following platform features are unsupported: | ||
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* Dual-redundant Core Lock-step (DCLS) execution is not emulated. | ||
* Xilinx Zynq TTC driver does not support tickless mode operation. | ||
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Programming and Debugging | ||
************************* | ||
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Use this configuration to run basic Zephyr applications and kernel tests in the | ||
QEMU emulated environment, for example, with the :ref:`synchronization_sample`: | ||
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.. zephyr-app-commands:: | ||
:zephyr-app: samples/synchronization | ||
:host-os: unix | ||
:board: qemu_cortex_r5 | ||
:goals: run | ||
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This will build an image with the synchronization sample app, boot it using | ||
QEMU, and display the following console output: | ||
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.. code-block:: console | ||
*** Booting Zephyr OS build v2.2.0 *** | ||
threadA: Hello World from qemu_cortex_r5! | ||
threadB: Hello World from qemu_cortex_r5! | ||
threadA: Hello World from qemu_cortex_r5! | ||
threadB: Hello World from qemu_cortex_r5! | ||
threadA: Hello World from qemu_cortex_r5! | ||
threadB: Hello World from qemu_cortex_r5! | ||
threadA: Hello World from qemu_cortex_r5! | ||
threadB: Hello World from qemu_cortex_r5! | ||
threadA: Hello World from qemu_cortex_r5! | ||
threadB: Hello World from qemu_cortex_r5! | ||
Exit QEMU by pressing :kbd:`CTRL+A` :kbd:`x`. | ||
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Debugging | ||
========= | ||
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Refer to the detailed overview about :ref:`application_debugging`. | ||
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References | ||
********** | ||
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1. ARMv7-A and ARMv7-R Architecture Reference Manual (ARM DDI 0406C ID051414) | ||
2. Cortex-R5 and Cortex-R5F Technical Reference Manual (ARM DDI 0460C ID021511) | ||
3. Zynq UltraScale+ Device Technical Reference Manual (UG1085) |
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