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Arch arm cortex m text section fix #21874

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ioannisg
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@ioannisg ioannisg commented Jan 13, 2020

Rename TEXT_SECTION_NAME_2 to text (TEXT_SECTION_NAME)

Addresses #21650 for Cortex-M

Additionally, fix some wrong pre-processor directives' indentation. [trivial]

@ioannisg ioannisg added area: ARM ARM (32-bit) Architecture bug The issue is a bug, or the PR is fixing a bug labels Jan 13, 2020
@zephyrbot zephyrbot added the area: API Changes to public APIs label Jan 13, 2020
andrewboie
andrewboie previously approved these changes Jan 13, 2020
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Not thrilled with the indentation changed, but not enough to -1.

Other patch LGTM, assuming sanitycheck doesn't throw errors about extra sections and this doesn't mess with MPU configuration.

@andrewboie andrewboie dismissed their stale review January 13, 2020 23:41

one more thought

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Could we just reverse the order of the text and data sections? and coalesce the vector table and ARM exception unwinding sections into rodata?

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Could we just reverse the order of the text and data sections? and coalesce the vector table and ARM exception unwinding sections into rodata?

In principle this could be done @andrewboie ; I am just wondering why we would like to do this for ARM Cortex-M; apparently there's a similar sructure in other ARCHEs; text section comes before rodata....

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apparently there's a similar sructure in other ARCHEs; text section comes before rodata...

There's no requirement to what order they appear in. I reordered some data sections on 32-bit x86 to solve a technical problem.

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apparently there's a similar sructure in other ARCHEs; text section comes before rodata...

There's no requirement to what order they appear in. I reordered some data sections on 32-bit x86 to solve a technical problem.

I understand. But what is the problem here, with the current ordering of the sections? If reordering does an improvement, I am up for it. :)

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I'm not saying there's a problem, but I think reversing the sections is simpler

@ioannisg ioannisg added this to the v2.2.0 milestone Jan 15, 2020
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@wentongwu could you please review this patch (the one that renames the .text section) and see if this will work with Code Relocation?

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@wentongwu can you take a look at this?

switching the rodata and text areas had side effects, this approach is OK with me

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The #include <snippets-text-start.ld> is now no longer in the text section, so you should move it. Unfortunately, this means moving the contents of aarch32/vector_table.ld, text_section_offset.ld (keep this file still for riscv and x86), and cc32xx_debug.ld back into the new vector table section.

@@ -135,7 +135,8 @@ SECTIONS

_image_rom_start = ROM_ADDR;

SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
/* The exception vector table is located at the beginning of ROM */
SECTION_PROLOGUE(vector_table,,)
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riscv has the same scheme, but calls the section "vector", maybe align on that name?

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I think the name is good; it is actually the ARM Cortex-M exception vector table; maybe we could rename the Risc-V Section instead, but that's another story.

@ioannisg ioannisg force-pushed the arch_arm_cortex_m_text_section_fix branch from 07472c6 to e5b911f Compare January 17, 2020 13:35
@oyvindronningstad oyvindronningstad added the DNM This PR should not be merged (Do Not Merge) label Jan 17, 2020
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I'm working on this PR.

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I tried this on cc3220sf_launchxl, and got a linker error:

$ west build -b cc3220sf_launchxl
-- west build: build configuration:
       source directory: /home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get
       build directory: /home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build
       BOARD: cc3220sf_launchxl (origin: CMakeCache.txt)
-- west build: building application
[1/6] Linking C executable zephyr/zephyr_prebuilt.elf
FAILED: zephyr/zephyr_prebuilt.elf 
: && ccache /home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc    zephyr/CMakeFiles/zephyr_prebuilt.dir/misc/empty_file.c.obj  -o zephyr/zephyr_prebuilt.elf  -Wl,-T zephyr/linker.cmd -Wl,-Map=/home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build/zephyr/zephyr_prebuilt.map -Wl,--whole-archive app/libapp.a zephyr/libzephyr.a zephyr/arch/common/libarch__common.a zephyr/arch/arch/arm/core/aarch32/libarch__arm__core__aarch32.a zephyr/arch/arch/arm/core/aarch32/cortex_m/libarch__arm__core__aarch32__cortex_m.a zephyr/lib/libc/newlib/liblib__libc__newlib.a zephyr/lib/posix/liblib__posix.a zephyr/boards/arm/cc3220sf_launchxl/libboards__arm__cc3220sf_launchxl.a zephyr/subsys/net/libsubsys__net.a zephyr/subsys/net/l2/wifi/libsubsys__net__l2__wifi.a zephyr/subsys/net/ip/libsubsys__net__ip.a zephyr/drivers/gpio/libdrivers__gpio.a zephyr/drivers/serial/libdrivers__serial.a modules/ti/simplelink/source/ti/devices/cc32xx/lib..__modules__hal__ti__simplelink__source__ti__devices__cc32xx.a modules/ti/simplelink/lib..__modules__hal__ti__simplelink.a -Wl,--no-whole-archive zephyr/kernel/libkernel.a zephyr/CMakeFiles/offsets.dir/arch/arm/core/offsets/offsets.c.obj -L"/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/8.3.0/thumb/v7e-m/nofp" -L/home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build/zephyr -lgcc -Wl,--print-memory-usage -mthumb -mcpu=cortex-m4 -Wl,--gc-sections -Wl,--build-id=none -Wl,--sort-common=descending -Wl,--sort-section=alignment -Wl,-u,_OffsetAbsSyms -Wl,-u,_ConfigAbsSyms -nostdlib -static -no-pie -Wl,-X -Wl,-N -Wl,--orphan-handling=warn -mabi=aapcs -march=armv7e-m -lm -lc -lgcc -L"/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/arm-zephyr-eabi"/lib/thumb/v7e-m/nofp && :
/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/8.3.0/../../../../arm-zephyr-eabi/bin/ld:zephyr/linker.cmd:45: syntax error
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.

I have attached linker.cmd before and after the change.
linker.cmd.after.txt
linker.cmd.before.txt

We should not use indentation for pre-processor directives.
This commit fixes the indentation in the ARM Cortex-M linker
script.

Signed-off-by: Ioannis Glaropoulos <[email protected]>
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oyvindronningstad commented Jan 21, 2020

I tried this on cc3220sf_launchxl, and got a linker error:

$ west build -b cc3220sf_launchxl
-- west build: build configuration:
       source directory: /home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get
       build directory: /home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build
       BOARD: cc3220sf_launchxl (origin: CMakeCache.txt)
-- west build: building application
[1/6] Linking C executable zephyr/zephyr_prebuilt.elf
FAILED: zephyr/zephyr_prebuilt.elf 
: && ccache /home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc    zephyr/CMakeFiles/zephyr_prebuilt.dir/misc/empty_file.c.obj  -o zephyr/zephyr_prebuilt.elf  -Wl,-T zephyr/linker.cmd -Wl,-Map=/home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build/zephyr/zephyr_prebuilt.map -Wl,--whole-archive app/libapp.a zephyr/libzephyr.a zephyr/arch/common/libarch__common.a zephyr/arch/arch/arm/core/aarch32/libarch__arm__core__aarch32.a zephyr/arch/arch/arm/core/aarch32/cortex_m/libarch__arm__core__aarch32__cortex_m.a zephyr/lib/libc/newlib/liblib__libc__newlib.a zephyr/lib/posix/liblib__posix.a zephyr/boards/arm/cc3220sf_launchxl/libboards__arm__cc3220sf_launchxl.a zephyr/subsys/net/libsubsys__net.a zephyr/subsys/net/l2/wifi/libsubsys__net__l2__wifi.a zephyr/subsys/net/ip/libsubsys__net__ip.a zephyr/drivers/gpio/libdrivers__gpio.a zephyr/drivers/serial/libdrivers__serial.a modules/ti/simplelink/source/ti/devices/cc32xx/lib..__modules__hal__ti__simplelink__source__ti__devices__cc32xx.a modules/ti/simplelink/lib..__modules__hal__ti__simplelink.a -Wl,--no-whole-archive zephyr/kernel/libkernel.a zephyr/CMakeFiles/offsets.dir/arch/arm/core/offsets/offsets.c.obj -L"/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/8.3.0/thumb/v7e-m/nofp" -L/home/local/zephyrproject-work/zephyr/samples/net/sockets/http_get/build/zephyr -lgcc -Wl,--print-memory-usage -mthumb -mcpu=cortex-m4 -Wl,--gc-sections -Wl,--build-id=none -Wl,--sort-common=descending -Wl,--sort-section=alignment -Wl,-u,_OffsetAbsSyms -Wl,-u,_ConfigAbsSyms -nostdlib -static -no-pie -Wl,-X -Wl,-N -Wl,--orphan-handling=warn -mabi=aapcs -march=armv7e-m -lm -lc -lgcc -L"/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/arm-zephyr-eabi"/lib/thumb/v7e-m/nofp && :
/home/local/bin/zephyr-sdk-0.10.3/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/8.3.0/../../../../arm-zephyr-eabi/bin/ld:zephyr/linker.cmd:45: syntax error
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.

I have attached linker.cmd before and after the change.
linker.cmd.after.txt
linker.cmd.before.txt

Thanks, @vanti. I fixed it and tested locally, it compiles cleanly now.

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vanti commented Jan 21, 2020

Thanks, @vanti. I fixed it and tested locally, it compiles cleanly now.

Thanks, it does compile cleanly now. When I tried to run the executable however, it does not run correctly. From the code placement in the map file, I see that the cc32xx_debug section is now occupying 0xc, moving everything else forward:

cc32xx_debug    0x0000000001000000        0xc
                0x0000000000000000                . = 0x0
 *(SORT_BY_ALIGNMENT(.dbghdr))
 .dbghdr        0x0000000001000000        0xc zephyr/boards/arm/cc3220sf_launchxl/libboards__arm__cc3220sf_launchxl.a(dbghdr.c.obj)
                0x0000000001000000                ulDebugHeader
 *(SORT_BY_ALIGNMENT(.dbghdr.*))

text_section_offset
                0x000000000100000c      0x800
                0x0000000000000800                . = 0x800
 *fill*         0x000000000100000c      0x800 
                0x000000000100080c                . = ALIGN (0x4)

vector_table    0x000000000100080c      0x308
                0x000000000100080c                _vector_start = .
 *(SORT_BY_ALIGNMENT(.exc_vector_table))
 *(SORT_BY_ALIGNMENT(.exc_vector_table.*))
 .exc_vector_table._vector_table_section

Here is how it was before the change:

text            0x0000000001000000      0xb08
                0x0000000000000000                . = 0x0
 *(SORT_BY_ALIGNMENT(.dbghdr))
 .dbghdr        0x0000000001000000        0xc zephyr/boards/arm/cc3220sf_launchxl/libboards__arm__cc3220sf_launchxl.a(dbghdr.c.obj)
                0x0000000001000000                ulDebugHeader
 *(SORT_BY_ALIGNMENT(.dbghdr.*))
                0x0000000000000800                . = 0x800
 *fill*         0x000000000100000c      0x7f4 
                0x0000000001000800                . = ALIGN (0x4)
                0x0000000001000800                _vector_start = .
 *(SORT_BY_ALIGNMENT(.exc_vector_table))
 *(SORT_BY_ALIGNMENT(.exc_vector_table.*))
 .exc_vector_table._vector_table_section

Is it possible to preserve the original placement?

This commit does the following:
- renames the 'text' ROM section to 'rom_start', to reflect
  that this section is the first section of the image.
- renames the 'TEXT_SECTION_NAME_2' section to 'text', since
  that section (whose start is pointed by _image_text_start)
  holds the entire image text section.

The commit removes the confusion by having multiple ROM sections
named as 'text' in ARM Cortex-M builds.

Signed-off-by: Ioannis Glaropoulos <[email protected]>
Signed-off-by: Øyvind Rønningstad <[email protected]>
openocd linker sections are not supposed to be part of the
vector table sections. Place the sections after we define
the _vector_end linker symbol.

Signed-off-by: Ioannis Glaropoulos <[email protected]>
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Is it possible to preserve the original placement?

Thanks again @vanti and sorry I missed this.

This exposes a bigger problem, namely that moving the location counter (".") to a given offset from the start of the image is broken with this. It's possible to fix by changing

. = CONFIG_TEXT_SECTION_OFFSET;

to

. = ABSOLUTE(CONFIG_TEXT_SECTION_OFFSET + _image_rom_start);

but this I feel is quite an invasive change, since every place that moves the location counter has to be changed in the same way.

I suggest we go back to Ioannis' proposal, but call the section "rom_start", so it is defined as the "first" section, which makes it safe to put input sections there if they need such an offset.

In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <[email protected]>
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oyvindronningstad commented Jan 22, 2020

This is now reverted back to something close to Ioannis's initial proposal, with an added commit to rename TEXT_START to ROM_START and remove it from some arches (since they have very specific sections as their first section).

@zephyrbot zephyrbot added the area: ARC ARC Architecture label Jan 22, 2020
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This is now reverted back to something close to Ioannis's initial proposal, with an added commit to rename TEXT_START to ROM_START and remove it from some arches (since they have very specific sections as their first section).

@SebastianBoe @hakonfam could you revisit this, since it has been re-done?

@ioannisg ioannisg requested a review from vanti January 22, 2020 13:21
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Thanks for the fix. It now works on SimpleLink. LGTM!

@@ -151,7 +151,7 @@ SECTIONS

#endif /* CONFIG_CODE_DATA_RELOCATION */

SECTION_PROLOGUE(_TEXT_SECTION_NAME_2,,)
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
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Should we do the same fix for cortex-r ?

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Will do that on separate PR, hopefully by the cortex r contributors

@@ -151,7 +151,7 @@ SECTIONS

#endif /* CONFIG_CODE_DATA_RELOCATION */

SECTION_PROLOGUE(_TEXT_SECTION_NAME_2,,)
SECTION_PROLOGUE(_TEXT_SECTION_NAME,,)
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I see that _TEXT_SECTION_NAME_2 is used in scripts/sanitycheck for doing some size calculation. Should the script be updated to reflect these changes?

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Yeah, we left it there because we don't fix the cortex-r now. Will make sure I ask @stephanosio for the cortex r fix ::)

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Does this break the size calculation? What consequences does this have?

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@SebastianBoe I am not sure where "this" exactly refers to; i'll try to reply, anyways.

The current patch only renames the "TEXT_SECTION_NAME_2" section to "text", and the original "text" section to rom_start; note that that section contains the vector table.

The patch does not move any symbols between sections.

Where does size calculation take place?

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By this I meant this patch. Will see if I can find the relevant sanitycheck code.

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It appears that sanitycheck believes that _TEXT_SECTION_NAME_2 is in the rw area.

Which I assume is wrong, so this patch should not cause any regression, it might even fix
the calculation.

https://github.com/zephyrproject-rtos/zephyr/blob/master/scripts/sanitycheck#L1074

@andrewboie andrewboie merged commit 05f0d85 into zephyrproject-rtos:master Jan 23, 2020
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