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[WIP] stm32 mspi drivers for the MSPI flash and controller #78186

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@FRASTM FRASTM commented Sep 9, 2024

this PR is introducing the MSPI driver device a controller for the stm32 mcus : stm32H5 serie

  • MSPI device = nor flash node drivers/flash/flash_mspi_nor_mx typically the mx25lm51245 mounted on the disco kit
    ---> compat is mspi_nor_mx25
  • MSPI controller : drivers/mspi/mspi_stm 32 typically the octospi peripherals of the stm32 devices.
    ---> compat is st,stm32-mspi-controller

Build an run the samples/drivers/mspi/mspi_flash/ on stm32h573i_dk disco kit​

  • only SPI / STR mode : configure/
  • SPI / STR mode : read (in async. IT ) ​
  • SPI / STR mode : erase/write (in async. IT ) wait for mem ready (typ. SPI_NOR_WEL_MATCH/SPI_NOR_WEL_MASK)
  • OPI/QUAD and DTR mode : configure/erase/read/write (octal commands)​
  • read/erase/write with DMA
  • XIP configuration (stm32 memorymap mode)​
  • Support more platforms (and NOR flash devices)​
  • Support psRAM device

@FRASTM FRASTM changed the title stm32 mspi drivers for the MSPI flash and controller [WIP] stm32 mspi drivers for the MSPI flash and controller Sep 10, 2024
@FRASTM FRASTM force-pushed the mspi_stm32 branch 4 times, most recently from 6dd0042 to c574a3d Compare September 12, 2024 16:21
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FRASTM commented Sep 12, 2024

reading external NOR at offset 0 in spi/str mode :

Perform test read on single sector
 command Instruction = 0x13
Data read at is 
Read at 00000000 read 08
Read at 00000001 read b5
Read at 00000002 read 06
Read at 00000003 read 4a                                                        
Read at 00000004 read 06                                                        
Read at 00000005 read 49                                                        
Read at 00000006 read 07                                                        
Read at 00000007 read 48                                                        
Read at 00000008 read 00                                                        
Read at 00000009 read f0                                                        
Read at 0000000a read 12                                                        
Read at 0000000b read f8                                                        
Read at 0000000c read bd                                                        
Read at 0000000d read e8                                                        
Read at 0000000e read 08                                                        
Read at 0000000f read 40  
Perform test on single sector                                                                                
Test 1: Flash erase at 0xff000                                                                               
Flash erase succeeded!                                                                                       
                                                                                                             
Test 2: Flash write at 0xff000                                                                               
Attempting to write 4 bytes                                                                                  
                                                                                                             
Test 3: Flash read at 0xff000                                                                                
Data read matches data written. Good!!                                                                       
                                                                                                             
Perform test on multiple consecutive sectors                                                                 
Test 1: Flash erase from 0xff000                                                                             
Flash erase succeeded!                                                                                       
                                                                                                             
Test 2: Flash write from 0xff000                                                                             
Attempting to write 4 bytes at offset 0xff000                                                                
Attempting to read 4 bytes at offset 0xff000                                                                 
Data read matches data written. Good!!                                                                       
Attempting to write 4 bytes at offset 0x100000                                                               
Attempting to read 4 bytes at offset 0x100000                                                                
Data read matches data written. Good!!                                                                       
==========================        

@FRASTM FRASTM force-pushed the mspi_stm32 branch 7 times, most recently from 8ff65f9 to 4617600 Compare September 19, 2024 16:33
@FRASTM FRASTM force-pushed the mspi_stm32 branch 12 times, most recently from a63ea6e to 2e07eb4 Compare September 27, 2024 09:49
@FRASTM FRASTM force-pushed the mspi_stm32 branch 2 times, most recently from 49f0d98 to e23716f Compare October 15, 2024 10:12
Add the mspi-device and mspi-flash controller bindings
for the stm32 devices.

Signed-off-by: Francois Ramu <[email protected]>
Replace the xpsi by the mspi node in the DTS
of the stm32h5 serie

Signed-off-by: Francois Ramu <[email protected]>
Enable the stm32 MSPI controller based on the xspi peripheral

Signed-off-by: Francois Ramu <[email protected]>
Enable the  MSPI NOR multi-SPI flash device accessed through
a mspi controller.

Signed-off-by: Francois Ramu <[email protected]>
Declare the mspi node of the stm32h573i_dk in place
of the xspi.
New properties are declared according to the
mspi-controller.yaml.
Only SPi/STR supported yet. XIP not supported yet.

Signed-off-by: Francois Ramu <[email protected]>
Add the configuration and overlay files to run the testcases
tests/drivers/mspi/api and tests/drivers/mspi/flash
on the stm32h573i_dk target
Now exclude from the samples/drivers:spi_flash

Signed-off-by: Francois Ramu <[email protected]>
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@RichardSWheatley RichardSWheatley left a comment

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Nice! Very nice driver!

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@swift-tk swift-tk left a comment

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I will start by thanking your support for the MSPI API. @FRASTM
After taking a brief look and I think there are quite a lot of work to be done for both the controller and device driver.
Additionally, I would like to stress one more time that it is important to shroud hardware differences in the device driver. In this case, it is the flash_mspi_nor_mx.c. So that we may have shared drivers that can be used across platform.

}

/* Command to the flash for reading status register */
static int flash_mspi_nor_mx_status_read(const struct device *flash, uint8_t status)
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So the user context way did not work out?
The methods(auto polling) introduced in this function is not a common one thus should not appear like this in a shared driver as others(controllers) will not be able to use this driver.
Also I'm confused with the use of async PIO but does not register callback?


/* Function to read the flash with possible PIO IT or DMA */
static int flash_mspi_nor_mx_read(const struct device *flash, off_t offset, void *rdata,
size_t size)
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You will need to consider controllers that does not support XIP read.
The config CONFIG_MSPI_XIP is used to indicate a controller's support on that.
It was my bad that I did not include those config in my PR for the atxp032 flash driver and will be fixed in the near future. You should consider adding them like this #79513

return -EIO;
}

/* At this time only set the io_mode and data rate */
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You can't assume that only setting IO mode and data rate is enough.
Different controller have different defaults when it comes to the member of struct mspi_dev_cfg. Even the initialization process may needed different values. So they should specified and configure clearly.
Thus this should be a CONFIG_ALL.

/*
* We should check here that the mem is ready,
* configure it according to the io-mode/data-rate
* MSPI_DEVICE_CONFIG_ALL will overwrite the previous config of the MSPI
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That is the point actually. The initial mspi_dev_config is only for device initialization and the settings should be power on default/OTP default. You can have several mspi_dev_config if needed be but the final mspi_dev_config should bring it to the target operational state.

data->packet.address = offset;
data->packet.data_buf = rdata;
data->packet.num_bytes = size;
/* ASYNC transfer : use callback on Irq if PIO, meaningless with DMA */
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Not sure I understand the reason why DMA is not used. Now that I think of it, maybe we should make it configurable for different controllers or users.

/*
* async + MSPI_PIO : Use callback on Irq if PIO
* sync + MSPI_PIO use timeout (mainly for NOR command and param
* MSPI_DMA : async/sync is meaningless with DMA (no DMA IT function)t
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Does mspi_transceive return before DMA completes the transfer? If so, it is async. The complete status is updated through callback.

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4 participants