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merge(main); Merge main into if_gen #623

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merged 84 commits into from
Nov 6, 2023
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299c4a0
chore(LIB): Update LIB
arturum1 Oct 6, 2023
5760508
fix(regex): Fix regex expression in iob_soc_create_system.py
arturum1 Oct 6, 2023
e0fcec0
update(LIB, UART, CACHE): submodules
P-Miranda Oct 20, 2023
e04d54a
update(CACHE)
P-Miranda Oct 20, 2023
afebfd2
Merge pull request #607 from P-Miranda/python-setup
jjts Oct 20, 2023
674ab69
Revert "[LIB] updated submodule"
arturum1 Oct 23, 2023
9e65b81
chore(submodules): update submodules
arturum1 Oct 23, 2023
4842a60
change github actions flow
jjts Oct 24, 2023
a0d3428
fix github actions flow
jjts Oct 24, 2023
c0bc2ab
fix github actions using extraneous risc-v toolchain
jjts Oct 24, 2023
bdedc19
fix github actions
jjts Oct 24, 2023
68c496d
fix github actions
jjts Oct 24, 2023
327de43
chore(submodules): update submodules
arturum1 Oct 24, 2023
29ba78d
Merge branch 'python-setup' of github.com:IObundle/iob-soc into pytho…
arturum1 Oct 24, 2023
8d22b4e
a much lighter test setup
jjts Oct 25, 2023
e850e6a
clean up files, fix doc generate
jjts Oct 25, 2023
3c2b14a
update lib
jjts Oct 25, 2023
d483b62
Merge branch 'python-setup' of github.com:IObundle/iob-soc into pytho…
arturum1 Oct 25, 2023
da0b651
fix(ext_mem): Fix ext_mem0 connections to `axi_m_port` bus.
arturum1 Oct 25, 2023
febade7
remove uart and lib submodules
jjts Oct 25, 2023
657d6d3
integrate LIB and UART
jjts Oct 25, 2023
e0a44bd
fix integrated uart makefile
jjts Oct 25, 2023
680be74
add axi submodule, update cache submodule, add uart and cache ghactio…
jjts Oct 25, 2023
e5a2204
update ghactions yml and cache submodule
jjts Oct 25, 2023
4a82031
style(files): Add `iob_soc_` prefix to Verilog sources.
arturum1 Oct 25, 2023
03d948a
Update README.md
jjts Oct 25, 2023
d76f6a4
improve makefile after readme
jjts Oct 25, 2023
ddc4770
Merge branch 'main' of github.com:IObundle/iob-soc
jjts Oct 25, 2023
ebbe938
chore(cache): Update cache submodule
arturum1 Oct 26, 2023
a078f84
Merge branch 'python-setup'
arturum1 Oct 26, 2023
9d3b9ca
feat(LIB): Merge LIB PR into IOb-SoC.
arturum1 Oct 26, 2023
50e872a
feat(uart): Merge UART PR into IOb-SoC
arturum1 Oct 26, 2023
37ba391
style(format): Run python formatter.
arturum1 Oct 26, 2023
3322989
fix(iob_soc_utils.py): Fix LIB directory location in iob_soc_utils.py
arturum1 Oct 26, 2023
a6e3ca7
Merge pull request #608 from arturum1/python-setup
jjts Oct 26, 2023
ee8e642
fix(LIB): search modules in SOC/submodules
P-Miranda Oct 27, 2023
7b5077b
feat(CI): add LIB test job
P-Miranda Oct 27, 2023
02ec1d2
fix(CI): run LIB tests from nix-shell
P-Miranda Oct 27, 2023
d52f9ec
fix(LIB): update PROJECT_ROOT to match UART
P-Miranda Oct 27, 2023
d26b33a
merge(main): merge main branch into if_gen
P-Miranda Oct 27, 2023
938fae1
fix(LIB): fix LIB tests
P-Miranda Oct 27, 2023
456bc05
fix(iob2axil): remove duplicated module
P-Miranda Oct 27, 2023
cbf6b8c
fix(iob_utils): remove duplicated module
P-Miranda Oct 27, 2023
f2d6bf5
Merge pull request #610 from P-Miranda/main
jjts Oct 27, 2023
78dc7ab
feat(N_SLAVES): Allow override of N_SLAVES macro by subclasses.
arturum1 Oct 27, 2023
15268f8
use bizarre bus width to facilitate debug
jjts Oct 29, 2023
21facb1
add synthesis flow
jjts Oct 29, 2023
d911ed2
improve build makefile
jjts Oct 29, 2023
53c27e7
feat(refactor): Update `axi_m_port` part select script.
arturum1 Oct 30, 2023
eea7c32
Merge branch 'main' of github.com:IObundle/iob-soc into python-setup
arturum1 Oct 30, 2023
a07a438
fix(quartus): run `timing.tcl` once, report names
P-Miranda Oct 30, 2023
b19285b
chore(submodules): Update AXI submodule
arturum1 Oct 30, 2023
a29be36
Merge branch 'main' of github.com:arturum1/iob-soc into python-setup
arturum1 Oct 30, 2023
6c9e680
Merge pull request #613 from P-Miranda/report
jjts Oct 31, 2023
d24d7f6
fix(fpga): add fpga test target
P-Miranda Oct 31, 2023
b1a4df5
feat(CI): update fpga targets to run test
P-Miranda Oct 31, 2023
1530106
Merge pull request #615 from P-Miranda/main
jjts Oct 31, 2023
8dd3cd9
Merge pull request #614 from arturum1/main
jjts Oct 31, 2023
6171c2e
feature: counter and sipo to support clock negedge operation
jjts Nov 1, 2023
ef13358
fix parameters in instances
jjts Nov 1, 2023
26437ef
fix nasty bug
jjts Nov 2, 2023
1d8610d
fix bug
jjts Nov 2, 2023
92590af
[LIB] fixed spyglass and alint tcl
AndreMerendeira Nov 2, 2023
d47f118
Merge pull request #616 from AndreMerendeira/main
jjts Nov 2, 2023
f13336a
fix(CI): run individual fpga tests
P-Miranda Nov 2, 2023
5232076
Merge pull request #617 from P-Miranda/main
jjts Nov 2, 2023
23c4a2c
fix manual read regs
jjts Nov 3, 2023
380716a
Merge branch 'main' of github.com:IObundle/iob-soc
jjts Nov 3, 2023
2115443
fix(sw): use SWREG_ADDR as macro address
P-Miranda Nov 3, 2023
aaea540
fix(hw): remove unused SWREG_rvalid_rd signal
P-Miranda Nov 3, 2023
f805054
Merge pull request #619 from P-Miranda/mkregs-macros
jjts Nov 3, 2023
45adf43
[mkregs] removed unused pc
AndreMerendeira Nov 3, 2023
161b9bd
Merge branch 'main' of github.com:IObundle/iob-soc
AndreMerendeira Nov 3, 2023
c20c97b
Merge pull request #620 from AndreMerendeira/main
jjts Nov 3, 2023
89c968c
feat(LIB, AXI, UART): LIB, UART tests passed
P-Miranda Nov 3, 2023
c45bd2a
remove implicit dependency to sw build
jjts Nov 3, 2023
ce0ea8c
fix merge conflict
jjts Nov 3, 2023
16c03d4
feat(CI): working soc tests
P-Miranda Nov 3, 2023
f3dc31b
format file
jjts Nov 4, 2023
4d54034
fix: remove _nxt signals from swreg and fix axil and apb converters a…
jjts Nov 5, 2023
e067992
improve iob2axil converter and upate picorv32
jjts Nov 5, 2023
d82e624
fix iob_ready generation
jjts Nov 6, 2023
fe0a293
Merge remote-tracking branch 'upstream/main' into merge-if_gen-main
P-Miranda Nov 6, 2023
369fa08
fix(merge): iob-soc passes CI tests
P-Miranda Nov 6, 2023
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178 changes: 53 additions & 125 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -14,172 +14,102 @@ concurrency:
on:
push:
branches: '*'
# Don't forget to require approval for all outside collaborators
pull_request:
branches: '*'
# Allow manual workflow runs
workflow_dispatch:

jobs:
pc-emul:
lib:
runs-on: self-hosted
timeout-minutes: 5

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
- name: clean
run: make clean
- name: setup
run: nix-shell --run "make setup"
- name: pc-emul test
run: make -C ../iob_soc_V* pc-emul-test

verilator:
- name: run LIB test
run: nix-shell --run "cd submodules/LIB; ./scripts/test.sh test"

uart:
runs-on: self-hosted
timeout-minutes: 30
# run even if previous job failed
if: ${{ !cancelled() }}
# run after indicated job
needs: [ pc-emul ]

timeout-minutes: 5

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
# Init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup init_mem
run: nix-shell --run "make setup"
- name: verilator test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=verilator"
# No init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup
run: nix-shell --run "make setup INIT_MEM=0"
- name: verilator test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=verilator"
# Init mem and Ext mem
- name: clean
run: nix-shell --run "make clean"
- name: setup init_mem ext_mem
run: nix-shell --run "make setup INIT_MEM=1 USE_EXTMEM=1"
- name: verilator test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=verilator"
# No init mem and Ext mem
- name: clean
run: nix-shell --run "make clean"
- name: setup ext_mem
run: nix-shell --run "make setup INIT_MEM=0 USE_EXTMEM=1"
- name: verilator test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=verilator"

icarus:
- name: run uart test
run: make -C submodules/UART test

cache:
runs-on: self-hosted
timeout-minutes: 90
timeout-minutes: 5

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
- name: run cache test
run: make -C submodules/CACHE sim-test


pc-emul:
runs-on: self-hosted
timeout-minutes: 5

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
- name: run test
run: make pc-emul-test

simulation:
runs-on: self-hosted
timeout-minutes: 30
# run even if previous job failed
if: ${{ !cancelled() }}
needs: [ pc-emul ]

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
# Init mem
- name: clean
run: make clean
- name: setup init_mem
run: nix-shell --run "make setup"
- name: icarus test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=icarus"
# No init mem - Disabled because it takes too long and is already checked by verilator
#- name: clean
# run: make clean
#- name: setup
# run: nix-shell --run "make setup INIT_MEM=0"
#- name: icarus test
# run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=icarus"
# Init mem and Ext mem
- name: clean
run: make clean
- name: setup init_mem ext_mem
run: nix-shell --run "make setup INIT_MEM=1 USE_EXTMEM=1"
- name: icarus test
run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=icarus"
# No init mem and Ext mem - Disabled because it takes too long and is already checked by verilator
#- name: clean
# run: make clean
#- name: setup ext_mem
# run: nix-shell --run "make setup INIT_MEM=0 USE_EXTMEM=1"
#- name: icarus test
# run: nix-shell --run "make -C ../iob_soc_V* sim-test SIMULATOR=icarus"
- name: run test
run: nix-shell --run "make sim-test"

cyclonev:
runs-on: self-hosted
timeout-minutes: 60
if: ${{ !cancelled() }}
needs: [ icarus, verilator ]
needs: [ pc-emul ]

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
# Init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup init_mem
run: nix-shell --run "make setup"
- name: cyclonev test
run: make -C ../iob_soc_V* fpga-test BOARD=CYCLONEV-GT-DK
# No init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup
run: nix-shell --run "make setup INIT_MEM=0"
- name: cyclonev test
run: make -C ../iob_soc_V* fpga-test BOARD=CYCLONEV-GT-DK
# No init mem and Ext mem
- name: clean
run: nix-shell --run "make clean"
- name: setup ext_mem
run: nix-shell --run "make setup INIT_MEM=0 USE_EXTMEM=1"
- name: cyclonev test
run: make -C ../iob_soc_V* fpga-test BOARD=CYCLONEV-GT-DK
- name: init mem and no ext mem
run: make fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=1 USE_EXTMEM=0
- name: no init mem and ext mem
run: make fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=0 USE_EXTMEM=1


aes-ku040:
runs-on: self-hosted
timeout-minutes: 90
if: ${{ !cancelled() }}
needs: [ icarus, verilator ]
needs: [ pc-emul ]

steps:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
# Init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup init_mem
run: nix-shell --run "make setup"
- name: ku040 test
run: make -C ../iob_soc_V* fpga-test BOARD=AES-KU040-DB-G
# No init mem
- name: clean
run: nix-shell --run "make clean"
- name: setup
run: nix-shell --run "make setup INIT_MEM=0"
- name: ku040 test
run: make -C ../iob_soc_V* fpga-test BOARD=AES-KU040-DB-G
# No init mem and Ext mem
- name: clean
run: nix-shell --run "make clean"
- name: setup ext_mem
run: nix-shell --run "make setup INIT_MEM=0 USE_EXTMEM=1"
- name: ku040 test
run: make -C ../iob_soc_V* fpga-test BOARD=AES-KU040-DB-G

- name: init mem and no ext mem
run: make fpga-run BOARD=AES-KU040-DB-G INIT_MEM=1 USE_EXTMEM=0
- name: no init mem and ext mem
run: make fpga-run BOARD=AES-KU040-DB-G INIT_MEM=0 USE_EXTMEM=1

doc:
runs-on: self-hosted
timeout-minutes: 60
Expand All @@ -190,9 +120,7 @@ jobs:
- uses: actions/checkout@v3
with:
submodules: 'recursive'
- name: clean
run: nix-shell --run "make clean"
- name: setup
run: nix-shell --run "make setup"
- name: doc test
run: nix-shell --run "make -C ../iob_soc_V* doc-test"


62 changes: 40 additions & 22 deletions Makefile
Original file line number Diff line number Diff line change
@@ -1,40 +1,58 @@
CORE := iob_soc

SIMULATOR ?= icarus
BOARD ?= CYCLONEV-GT-DK

DISABLE_LINT:=1
export DISABLE_LINT

INIT_MEM ?= 1
include submodules/LIB/setup.mk

clean:
rm -rf ../$(CORE)_V*
INIT_MEM ?= 1
USE_EXTMEM ?= 0

setup:
python3 -B ./$(CORE).py INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM)

pc-emul-run:
nix-shell --run 'make clean setup && make -C ../$(CORE)_V*/ pc-emul-run'

pc-emul-test:
nix-shell --run 'make clean setup && make -C ../$(CORE)_V*/ pc-emul-test'

sim-build: clean setup
make -C ../$(CORE)_V*/ sim-build SIMULATOR=$(SIMULATOR)

sim-run: clean setup
make -C ../$(CORE)_V*/ sim-run SIMULATOR=$(SIMULATOR)
sim-run:
nix-shell --run 'make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V*/ fw-build'
nix-shell --run 'make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V*/ sim-run SIMULATOR=$(SIMULATOR)'

sim-test:
make clean && make setup && make -C ../$(CORE)_V*/ sim-test
make clean && make setup INIT_MEM=0 && make -C ../$(CORE)_V*/ sim-test SIMULATOR=verilator
make clean && make setup USE_EXTMEM=1 && make -C ../$(CORE)_V*/ sim-test
make clean && make setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V*/ sim-test SIMULATOR=verilator
nix-shell --run 'make clean setup INIT_MEM=1 USE_EXTMEM=0 && make -C ../$(CORE)_V*/ sim-test SIMULATOR=icarus'
nix-shell --run 'make clean setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V*/ sim-test SIMULATOR=verilator'
nix-shell --run 'make clean setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V*/ sim-test SIMULATOR=verilator'

fpga-run:
nix-shell --run 'make clean setup INIT_MEM=$(INIT_MEM) USE_EXTMEM=$(USE_EXTMEM) && make -C ../$(CORE)_V*/ fpga-fw-build BOARD=$(BOARD)'
make -C ../$(CORE)_V*/ fpga-run BOARD=$(BOARD)

fpga-test:
make clean && make setup && make -C ../$(CORE)_V*/ fpga-test
make clean && make setup INIT_MEM=0 && make -C ../$(CORE)_V*/ fpga-test
make clean && make setup INIT_MEM=0 USE_EXTMEM=1 && make -C ../$(CORE)_V*/ fpga-test

test-all:
make clean && make setup && make -C ../$(CORE)_V*/ pc-emul-test
#make sim-test SIMULATOR=icarus
make sim-test SIMULATOR=verilator
make fpga-test BOARD=CYCLONEV-GT-DK
make fpga-test BOARD=AES-KU040-DB-G
make clean && make setup && make -C ../$(CORE)_V*/ doc-test

.PHONY: sim-test fpga-test test-all
make clean setup fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=1 USE_EXTMEM=0
make clean setup fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=0 USE_EXTMEM=1
make clean setup fpga-run BOARD=AES-KU040-DB-G INIT_MEM=1 USE_EXTMEM=0
make clean setup fpga-run BOARD=AES-KU040-DB-G INIT_MEM=0 USE_EXTMEM=1

syn-build: clean
nix-shell --run "make setup && make -C ../$(CORE)_V*/ syn-build"

doc-build:
nix-shell --run 'make clean setup && make -C ../$(CORE)_V*/ doc-build'

doc-test:
nix-shell --run 'make clean setup && make -C ../$(CORE)_V*/ doc-test'


test-all: pc-emul-test sim-test fpga-test doc-test


.PHONY: setup sim-test fpga-test doc-test test-all
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