Lerdge S,X,K Board Support

.github/workflows/test-builds.yml

@@ -67,6 +67,7 @@ jobs:
         - rumba32_f446ve
         - rumba32_mks
         - mks_robin_pro
+        - LERDGEX
 
         # Put lengthy tests last
 

Marlin/src/pins/stm32f4/pins_LERDGE_X.h

@@ -27,6 +27,9 @@
 #define BOARD_INFO_NAME      "Lerdge X"
 #define DEFAULT_MACHINE_NAME "LERDGE"
 
+#define STEP_TIMER 4
+#define TEMP_TIMER 2
+
 //#define I2C_EEPROM
 
 //
@@ -61,35 +64,35 @@
 #define X_DIR_PIN                           PB2
 #define X_ENABLE_PIN                        PB11
 //#ifndef X_CS_PIN
-//  #define X_CS_PIN       PD1
+//  #define X_CS_PIN                        PD1
 //#endif
 
 #define Y_STEP_PIN                          PB0
 #define Y_DIR_PIN                           PC5
 #define Y_ENABLE_PIN                        PB1
 //#ifndef Y_CS_PIN
-//  #define Y_CS_PIN       PE12
+//  #define Y_CS_PIN                        PE12
 //#endif
 
 #define Z_STEP_PIN                          PA7
 #define Z_DIR_PIN                           PA6
 #define Z_ENABLE_PIN                        PC4
 //#ifndef Z_CS_PIN
-//  #define Z_CS_PIN       PD5
+//  #define Z_CS_PIN                        PD5
 //#endif
 
 #define E0_STEP_PIN                         PA4
 #define E0_DIR_PIN                          PA3
 #define E0_ENABLE_PIN                       PA5
 //#ifndef E0_CS_PIN
-//  #define E0_CS_PIN      PB4
+//  #define E0_CS_PIN                       PB4
 //#endif
 
 #define E1_STEP_PIN                         -1
 #define E1_DIR_PIN                          -1
 #define E1_ENABLE_PIN                       -1
 //#ifndef E1_CS_PIN
-//  #define E1_CS_PIN      PE5
+//  #define E1_CS_PIN                       PE5
 //#endif
 
 //
@@ -146,14 +149,14 @@
 //
 // SD support
 //
-#define SDIO_SUPPORT
+//#define SDIO_SUPPORT
+#define SD_DETECT_PIN                       -1
 
 //
 // LCD / Controller
 //
 
 // The LCD is initialized in FSMC mode
-#define SD_DETECT_PIN                       -1
 #define BEEPER_PIN                          PD12
 
 #define BTN_EN1                             PE3
@@ -162,15 +165,24 @@
 
 #define LCD_RESET_PIN                       PD6
 #define LCD_BACKLIGHT_PIN                   PD3
-#define FSMC_CS_PIN                         PD4
-#define FSMC_RS_PIN                         PD11
-#define TOUCH_CS                            PB6
+#define TFT_CS_PIN                          PD4
+#define TFT_RS_PIN                          PD11
+#define TOUCH_CS_PIN                        PB6
+#define TOUCH_SCK_PIN                       PB3
+#define TOUCH_MOSI_PIN                      PB5
+#define TOUCH_MISO_PIN                      PB4
 
 //
 // ST7920 Delays
 //
 #if HAS_GRAPHICAL_LCD
-  #define BOARD_ST7920_DELAY_1 DELAY_NS(96)
-  #define BOARD_ST7920_DELAY_2 DELAY_NS(48)
-  #define BOARD_ST7920_DELAY_3 DELAY_NS(715)
+  #ifndef BOARD_ST7920_DELAY_1
+    #define BOARD_ST7920_DELAY_1 DELAY_NS(96)
+  #endif
+  #ifndef BOARD_ST7920_DELAY_2
+    #define BOARD_ST7920_DELAY_2 DELAY_NS(48)
+  #endif
+  #ifndef BOARD_ST7920_DELAY_3
+    #define BOARD_ST7920_DELAY_3 DELAY_NS(715)
+  #endif
 #endif

buildroot/share/PlatformIO/boards/LERDGE_X.json

@@ -0,0 +1,64 @@
+{
+  "build": {
+    "core": "stm32",
+    "cpu": "cortex-m4",
+    "extra_flags": "-DSTM32F407xx",
+    "f_cpu": "168000000L",
+    "hwids": [
+      [
+        "0x1EAF",
+        "0x0003"
+      ],
+      [
+        "0x0483",
+        "0x3748"
+      ]
+    ],
+    "mcu": "stm32f407zgt6",
+    "variant": "LERDGE_X"
+  },
+  "debug": {
+    "jlink_device": "STM32F407ZG",
+    "openocd_target": "stm32f4x",
+    "svd_path": "STM32F40x.svd",
+    "tools": {
+      "stlink": {
+        "server": {
+          "arguments": [
+            "-f",
+            "scripts/interface/stlink.cfg",
+            "-c",
+            "transport select hla_swd",
+            "-f",
+            "scripts/target/stm32f4x.cfg",
+            "-c",
+            "reset_config none"
+          ],
+          "executable": "bin/openocd",
+          "package": "tool-openocd"
+        }
+      }
+    }
+  },
+  "frameworks": [
+    "arduino",
+    "stm32cube"
+  ],
+  "name": "STM32F407ZGT6(192k RAM. 1024k Flash)",
+  "upload": {
+    "disable_flushing": false,
+    "maximum_ram_size": 196608,
+    "maximum_size": 1048576,
+    "protocol": "stlink",
+    "protocols": [
+      "stlink",
+      "dfu",
+      "jlink"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": false,
+    "wait_for_upload_port": false
+  },
+  "url": "http://www.st.com/en/microcontrollers/stm32f407ZG.html",
+  "vendor": "Generic"
+}

buildroot/share/PlatformIO/ldscripts/lerdge.ld

@@ -0,0 +1,186 @@
+/*
+*****************************************************************************
+**
+**  File        : LinkerScript.ld
+**
+**  Abstract    : Linker script for STM32F407VGTx Device with
+**                1024KByte FLASH, 128KByte RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+**  (c)Copyright Ac6.
+**  You may use this file as-is or modify it according to the needs of your
+**  project. Distribution of this file (unmodified or modified) is not
+**  permitted. Ac6 permit registered System Workbench for MCU users the
+**  rights to distribute the assembled, compiled & linked contents of this
+**  file as part of an application binary file, provided that it is built
+**  using the System Workbench for MCU toolchain.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20010000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;;      /* required amount of heap  */
+_Min_Stack_Size = 0x400;; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x8010000, LENGTH = 312K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+CCMRAM (rw)      : ORIGIN = 0x10000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata ALIGN(4):
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >FLASH
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  _siccmram = LOADADDR(.ccmram);
+
+  /* CCM-RAM section
+  *
+  * IMPORTANT NOTE!
+  * If initialized variables will be placed in this section,
+  * the startup code needs to be modified to copy the init-values.
+  */
+  .ccmram :
+  {
+    . = ALIGN(4);
+    _sccmram = .;       /* create a global symbol at ccmram start */
+    *(.ccmram)
+    *(.ccmram*)
+
+    . = ALIGN(4);
+    _eccmram = .;       /* create a global symbol at ccmram end */
+  } >CCMRAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(4);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(4);
+  } >RAM
+
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}

buildroot/share/PlatformIO/scripts/copy_marlin_variant_to_framework.py

@@ -0,0 +1,34 @@
+import os,shutil
+from SCons.Script import DefaultEnvironment
+from platformio import util
+
+def copytree(src, dst, symlinks=False, ignore=None):
+    for item in os.listdir(src):
+        s = os.path.join(src, item)
+        d = os.path.join(dst, item)
+        if os.path.isdir(s):
+            shutil.copytree(s, d, symlinks, ignore)
+        else:
+            shutil.copy2(s, d)
+
+env = DefaultEnvironment()
+platform = env.PioPlatform()
+board = env.BoardConfig()
+
+FRAMEWORK_DIR = platform.get_package_dir("framework-arduinoststm32")
+assert os.path.isdir(FRAMEWORK_DIR)
+assert os.path.isdir("buildroot/share/PlatformIO/variants")
+
+variant = board.get("build.variant")
+variant_dir = os.path.join(FRAMEWORK_DIR, "variants", variant)
+
+source_dir = os.path.join("buildroot/share/PlatformIO/variants", variant)
+assert os.path.isdir(source_dir)
+
+if os.path.isdir(variant_dir):
+    shutil.rmtree(variant_dir)
+
+if not os.path.isdir(variant_dir):
+    os.mkdir(variant_dir)
+
+copytree(source_dir, variant_dir)