NanoMips: OR combine optimization #8
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Combine OR into INS when there is no masking for the second register but it holds zero extended value whose original width is less than equal to the number of bits from the first register set to zero.
This allows the INS instruction to be used to set the value of one field of the bitfields struct.
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Added one more commit which allows 16-bit masks to be recognized as valid inside OR to INS combiner. This makes it possible to use INS instruction to set the value of one field of the bitfields struct. Setting multiple fields consecutively using the INS instruction is not yet supported. |
cme
reviewed
Jul 6, 2023
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@nikolaperic should be created against |
Allow OR to INS combine without second register masking only if maximum possible value given by KnownBits for the second register can fit inside SMSize0.
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@cme Is there anything left blocking us from merging this? |
No, it has already been merged |
cme
pushed a commit
that referenced
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Sep 18, 2023
For the following program,
$ cat t.c
struct t {
int (__attribute__((btf_type_tag("rcu"))) *f)();
int a;
};
int foo(struct t *arg) {
return arg->a;
}
Compiling with 'clang -g -O2 -S t.c' will cause a failure like below:
clang: /home/yhs/work/llvm-project/clang/lib/Sema/SemaType.cpp:6391: void {anonymous}::DeclaratorLocFiller::VisitParenTypeLoc(clang::ParenTypeLoc):
Assertion `Chunk.Kind == DeclaratorChunk::Paren' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
......
#5 0x00007f89e4280ea5 abort (/lib64/libc.so.6+0x21ea5)
#6 0x00007f89e4280d79 _nl_load_domain.cold.0 (/lib64/libc.so.6+0x21d79)
#7 0x00007f89e42a6456 (/lib64/libc.so.6+0x47456)
#8 0x00000000045c2596 GetTypeSourceInfoForDeclarator((anonymous namespace)::TypeProcessingState&, clang::QualType, clang::TypeSourceInfo*) SemaType.cpp:0:0
#9 0x00000000045ccfa5 GetFullTypeForDeclarator((anonymous namespace)::TypeProcessingState&, clang::QualType, clang::TypeSourceInfo*) SemaType.cpp:0:0
......
The reason of the failure is due to the mismatch of TypeLoc and D.getTypeObject().Kind. For example,
the TypeLoc is
BTFTagAttributedType 0x88614e0 'int btf_type_tag(rcu)()' sugar
|-ParenType 0x8861480 'int ()' sugar
| `-FunctionNoProtoType 0x8861450 'int ()' cdecl
| `-BuiltinType 0x87fd500 'int'
while corresponding D.getTypeObject().Kind points to DeclaratorChunk::Paren, and
this will cause later assertion.
To fix the issue, similar to AttributedTypeLoc, let us skip BTFTagAttributedTypeLoc in
GetTypeSourceInfoForDeclarator().
Differential Revision: https://reviews.llvm.org/D136807
farazs-github
pushed a commit
that referenced
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Mar 11, 2024
NanoMips: OR combine optimization
milica-lazarevic
pushed a commit
that referenced
this pull request
Jun 18, 2024
NanoMips: OR combine optimization
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Combine OR into INS when there is no masking for
the second register but it holds zero extended
value whose original width is less than equal to
the number of bits from the first register set
to zero.
This resolves the following issue: