Merge pull request #4628 from povik/bump-abc · YosysHQ/yosys@0556cb5

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Merge pull request #4628 from povik/bump-abc

Bump abc submodule

povik authored Oct 7, 2024

2 parents 0aab8b4 + 3e6e8c8 commit 0556cb5

abc

Submodule abc updated 47 files

+5 −5		.github/workflows/build-posix-cmake.yml
+3 −3		.github/workflows/build-posix.yml
+3 −3		.github/workflows/build-windows.yml
+1 −0		.gitignore
+4 −0		src/aig/gia/gia.h
+12 −0		src/aig/gia/giaAiger.c
+98 −0		src/aig/gia/giaAigerExt.c
+111 −41		src/aig/gia/giaClp.c
+275 −3		src/aig/gia/giaCut.c
+48 −0		src/aig/gia/giaEquiv.c
+378 −0		src/aig/gia/giaGen.c
+1 −1		src/aig/gia/giaIf.c
+5 −5		src/aig/gia/giaMinLut.c
+433 −30		src/aig/gia/giaMulFind.c
+64 −2		src/aig/gia/giaPat2.c
+11 −0		src/aig/gia/giaTtopt.cpp
+53 −67		src/aig/gia/giaUtil.c
+482 −72		src/base/abci/abc.c
+57 −0		src/base/abci/abcDec.c
+4 −1		src/base/abci/abcFx.c
+2 −0		src/base/abci/abcResub.c
+81 −10		src/base/io/io.c
+1 −1		src/base/io/ioAbc.h
+56 −3		src/base/io/ioUtil.c
+59 −17		src/base/io/ioWriteVerilog.c
+1 −0		src/base/wlc/wlc.h
+210 −25		src/base/wlc/wlcBlast.c
+8 −4		src/base/wlc/wlcCom.c
+4 −0		src/bdd/dsd/dsd.h
+189 −0		src/bdd/dsd/dsdTree.c
+121 −1		src/bdd/extrab/extraLutCas.h
+2 −2		src/map/if/acd/ac_decomposition.hpp
+9 −4		src/map/scl/scl.c
+4 −6		src/map/scl/sclBufSize.c
+1 −1		src/map/scl/sclLib.h
+76 −34		src/map/scl/sclLibUtil.c
+9 −2		src/misc/extra/extraUtilFile.c
+3 −0		src/misc/util/abc_global.h
+27 −0		src/misc/util/utilTruth.h
+2 −0		src/misc/vec/vecInt.h
+122 −0		src/opt/dau/dauNpn.c
+2 −0		src/opt/fxu/fxuReduce.c
+6 −2		src/proof/cec/cecCorr.c
+3 −1		src/sat/bmc/bmc.h
+133 −1		src/sat/bmc/bmcMaj.c
+75 −1		src/sat/bmc/bmcMaj2.c
+ −		test.ps

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