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FEAT: spice model terminal pair (#769)
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* FEAT: spice model terminal pair

* MISC: Auto fixes from pre-commit.com hooks

For more information, see https://pre-commit.ci

* fix minor

* fix minor

* MISC: Auto fixes from pre-commit.com hooks

For more information, see https://pre-commit.ci

---------

Co-authored-by: ring630 <@gmail.com>
Co-authored-by: pre-commit-ci[bot] <66853113+pre-commit-ci[bot]@users.noreply.github.com>
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hui-zhou-a and pre-commit-ci[bot] authored Sep 4, 2024
1 parent f5a9bea commit 1f064fe
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Showing 4 changed files with 41 additions and 21 deletions.
5 changes: 3 additions & 2 deletions src/pyedb/configuration/cfg_spice_models.py
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ def __init__(self, pdata, path_lib, spice_dict):
self.sub_circuit_name = self._spice_dict.get("sub_circuit_name", "")
self.apply_to_all = self._spice_dict.get("apply_to_all", True)
self.components = list(self._spice_dict.get("components", []))
self.terminal_pairs = self._spice_dict.get("terminal_pairs", None)

def apply(self):
"""Apply Spice model on layout."""
Expand All @@ -45,8 +46,8 @@ def apply(self):
comps = self._pedb.components.definitions[self.component_definition].components
if self.apply_to_all:
for ref_des, comp in comps.items():
comp.assign_spice_model(fpath, self.name, self.sub_circuit_name)
comp.assign_spice_model(fpath, self.name, self.sub_circuit_name, self.terminal_pairs)
else:
for ref_des, comp in comps.items():
if ref_des in self.components:
comp.assign_spice_model(fpath, self.name, self.sub_circuit_name)
comp.assign_spice_model(fpath, self.name, self.sub_circuit_name, self.terminal_pairs)
48 changes: 31 additions & 17 deletions src/pyedb/dotnet/edb_core/cell/hierarchy/component.py
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@

import logging
import re
from typing import Optional
import warnings

from pyedb.dotnet.edb_core.cell.hierarchy.hierarchy_obj import Group
Expand Down Expand Up @@ -808,7 +809,13 @@ def _set_model(self, model): # pragma: no cover
return False
return True

def assign_spice_model(self, file_path, name=None, sub_circuit_name=None):
def assign_spice_model(
self,
file_path: str,
name: Optional[str] = None,
sub_circuit_name: Optional[str] = None,
terminal_pairs: Optional[list] = None,
):
"""Assign Spice model to this component.
Parameters
Expand All @@ -828,23 +835,30 @@ def assign_spice_model(self, file_path, name=None, sub_circuit_name=None):
with open(file_path, "r") as f:
for line in f:
if "subckt" in line.lower():
pinNames = [i.strip() for i in re.split(" |\t", line) if i]
pinNames.remove(pinNames[0])
pinNames.remove(pinNames[0])
pin_names_sp = [i.strip() for i in re.split(" |\t", line) if i]
pin_names_sp.remove(pin_names_sp[0])
pin_names_sp.remove(pin_names_sp[0])
break
if len(pinNames) == self.numpins:
model = self._edb.cell.hierarchy._hierarchy.SPICEModel()
model.SetModelPath(file_path)
model.SetModelName(name)
if sub_circuit_name:
model.SetSubCkt(sub_circuit_name)
terminal = 1
for pn in pinNames:
model.AddTerminalPinPair(pn, str(terminal))
terminal += 1
else: # pragma: no cover
logging.error("Wrong number of Pins")
return False
if not len(pin_names_sp) == self.numpins: # pragma: no cover
raise ValueError(f"Pin counts doesn't match component {self.name}.")

model = self._edb.cell.hierarchy._hierarchy.SPICEModel()
model.SetModelPath(file_path)
model.SetModelName(name)
if sub_circuit_name:
model.SetSubCkt(sub_circuit_name)

if terminal_pairs:
terminal_pairs = terminal_pairs if isinstance(terminal_pairs[0], list) else [terminal_pairs]
for pair in terminal_pairs:
pname, pnumber = pair
if pname not in pin_names_sp: # pragma: no cover
raise ValueError(f"Pin name {pname} doesn't exist in {file_path}.")
model.AddTerminalPinPair(pname, str(pnumber))
else:
for idx, pname in enumerate(pin_names_sp):
model.AddTerminalPinPair(pname, str(idx + 1))

return self._set_model(model)

def assign_s_param_model(self, file_path, name=None, reference_net=None):
Expand Down
8 changes: 6 additions & 2 deletions tests/legacy/system/test_edb_components.py
Original file line number Diff line number Diff line change
Expand Up @@ -454,15 +454,15 @@ def test_components_get_component_placement_vector(self):
assert len(vector) == 2
edb2.close()

def test_components_assign(self):
def test_components_assign(self, edb_examples):
"""Assign RLC model, S-parameter model and spice model."""
source_path = os.path.join(local_path, "example_models", test_subfolder, "ANSYS-HSD_V1.aedb")
target_path = os.path.join(self.local_scratch.path, "test_17.aedb")
self.local_scratch.copyfolder(source_path, target_path)
sparam_path = os.path.join(local_path, "example_models", test_subfolder, "GRM32_DC0V_25degC_series.s2p")
spice_path = os.path.join(local_path, "example_models", test_subfolder, "GRM32_DC0V_25degC.mod")

edbapp = Edb(target_path, edbversion=desktop_version)
edbapp = edb_examples.get_si_verse()
comp = edbapp.components.instances["R2"]
assert not comp.assign_rlc_model()
comp.assign_rlc_model(1, None, 3, False)
Expand Down Expand Up @@ -490,6 +490,10 @@ def test_components_assign(self):
comp.type = "Inductor"
comp.value = 10 # This command set the model back to ideal RLC
assert comp.type == "Inductor" and comp.value == 10 and float(comp.ind_value) == 10

edbapp.components["C164"].assign_spice_model(
spice_path, sub_circuit_name="GRM32ER60J227ME05_DC0V_25degC", terminal_pairs=[["port1", 2], ["port2", 1]]
)
edbapp.close()

def test_components_bounding_box(self):
Expand Down
1 change: 1 addition & 0 deletions tests/legacy/system/test_edb_configuration_2p0.py
Original file line number Diff line number Diff line change
Expand Up @@ -182,6 +182,7 @@ def test_03_spice_models(self, edb_examples):
"sub_circuit_name": "GRM32ER72A225KA35_25C_0V",
"apply_to_all": True,
"components": [],
"terminal_pairs": [["port1", 2], ["port2", 1]],
},
{
"name": "GRM32ER72A225KA35_25C_0V",
Expand Down

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