Merge pull request #173 from arceos-org/task-ext

Introduce user-defined task extended data

modules/axhal/src/arch/aarch64/mod.rs

@@ -4,7 +4,7 @@ pub(crate) mod trap;
 use core::arch::asm;
 
 use aarch64_cpu::registers::{DAIF, TPIDR_EL0, TTBR0_EL1, TTBR1_EL1, VBAR_EL1};
-use memory_addr::{pa, PhysAddr, VirtAddr};
+use memory_addr::{PhysAddr, VirtAddr};
 use tock_registers::interfaces::{Readable, Writeable};
 
 pub use self::context::{FpState, TaskContext, TrapFrame};

modules/axhal/src/arch/aarch64/trap.rs

@@ -1,7 +1,6 @@
 use core::arch::global_asm;
 
 use aarch64_cpu::registers::{ESR_EL1, FAR_EL1};
-use memory_addr::{va, VirtAddr};
 use page_table_entry::MappingFlags;
 use tock_registers::interfaces::Readable;
 

modules/axhal/src/arch/riscv/mod.rs

@@ -4,7 +4,7 @@ mod macros;
 mod context;
 mod trap;
 
-use memory_addr::{pa, PhysAddr, VirtAddr};
+use memory_addr::{PhysAddr, VirtAddr};
 use riscv::asm;
 use riscv::register::{satp, sstatus, stvec};
 

modules/axhal/src/arch/riscv/trap.rs

@@ -1,4 +1,3 @@
-use memory_addr::{va, VirtAddr};
 use page_table_entry::MappingFlags;
 use riscv::register::scause::{self, Exception as E, Trap};
 use riscv::register::stval;

modules/axhal/src/arch/x86_64/context.rs

@@ -1,5 +1,5 @@
 use core::{arch::asm, fmt};
-use memory_addr::{va, VirtAddr};
+use memory_addr::VirtAddr;
 
 /// Saved registers when a trap (interrupt or exception) occurs.
 #[allow(missing_docs)]

modules/axhal/src/arch/x86_64/mod.rs

@@ -7,7 +7,7 @@ mod trap;
 
 use core::arch::asm;
 
-use memory_addr::{pa, MemoryAddr, PhysAddr, VirtAddr};
+use memory_addr::{MemoryAddr, PhysAddr, VirtAddr};
 use x86::{controlregs, msr, tlb};
 use x86_64::instructions::interrupts;
 

modules/axhal/src/arch/x86_64/trap.rs

@@ -1,4 +1,3 @@
-use memory_addr::{va, VirtAddr};
 use page_table_entry::MappingFlags;
 use x86::{controlregs::cr2, irq::*};
 use x86_64::structures::idt::PageFaultErrorCode;

modules/axhal/src/lib.rs

@@ -34,6 +34,10 @@
 #[macro_use]
 extern crate log;
 
+#[allow(unused_imports)]
+#[macro_use]
+extern crate memory_addr;
+
 mod platform;
 
 #[macro_use]

modules/axhal/src/mem.rs

@@ -3,7 +3,7 @@
 use core::fmt;
 
 #[doc(no_inline)]
-pub use memory_addr::{pa, va, MemoryAddr, PhysAddr, VirtAddr, PAGE_SIZE_4K};
+pub use memory_addr::{MemoryAddr, PhysAddr, VirtAddr, PAGE_SIZE_4K};
 
 bitflags::bitflags! {
     /// The flags of a physical memory region.

modules/axhal/src/platform/aarch64_bsta1000b/dw_apb_uart.rs

@@ -3,7 +3,7 @@
 use crate::mem::phys_to_virt;
 use dw_apb_uart::DW8250;
 use kspin::SpinNoIrq;
-use memory_addr::{pa, PhysAddr};
+use memory_addr::PhysAddr;
 
 const UART_BASE: PhysAddr = pa!(axconfig::UART_PADDR);
 

modules/axhal/src/platform/aarch64_bsta1000b/mem.rs

@@ -1,4 +1,4 @@
-use crate::mem::{pa, MemRegion, PhysAddr};
+use crate::mem::MemRegion;
 use page_table_entry::{aarch64::A64PTE, GenericPTE, MappingFlags};
 
 /// Returns platform-specific memory regions.

modules/axhal/src/platform/aarch64_bsta1000b/mp.rs

@@ -1,4 +1,4 @@
-use crate::mem::{va, virt_to_phys, PhysAddr, VirtAddr};
+use crate::mem::{virt_to_phys, PhysAddr};
 
 /// Hart number of bsta1000b board
 pub const MAX_HARTS: usize = 8;

modules/axhal/src/platform/aarch64_common/boot.rs

@@ -1,6 +1,5 @@
 use aarch64_cpu::{asm, asm::barrier, registers::*};
 use core::ptr::addr_of_mut;
-use memory_addr::{pa, PhysAddr};
 use page_table_entry::aarch64::{MemAttr, A64PTE};
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 

modules/axhal/src/platform/aarch64_common/generic_timer.rs

@@ -61,7 +61,7 @@ pub(crate) fn init_early() {
     if axconfig::RTC_PADDR != 0 {
         use crate::mem::phys_to_virt;
         use arm_pl031::Rtc;
-        use memory_addr::{pa, PhysAddr};
+        use memory_addr::PhysAddr;
 
         const PL031_BASE: PhysAddr = pa!(axconfig::RTC_PADDR);
 

modules/axhal/src/platform/aarch64_common/gic.rs

@@ -1,7 +1,7 @@
 use crate::{irq::IrqHandler, mem::phys_to_virt};
 use arm_gicv2::{translate_irq, GicCpuInterface, GicDistributor, InterruptType};
 use kspin::SpinNoIrq;
-use memory_addr::{pa, PhysAddr};
+use memory_addr::PhysAddr;
 
 /// The maximum number of IRQs.
 pub const MAX_IRQ_COUNT: usize = 1024;

modules/axhal/src/platform/aarch64_common/pl011.rs

@@ -2,7 +2,7 @@
 
 use arm_pl011::Pl011Uart;
 use kspin::SpinNoIrq;
-use memory_addr::{pa, PhysAddr};
+use memory_addr::PhysAddr;
 
 use crate::mem::phys_to_virt;
 

modules/axhal/src/platform/aarch64_qemu_virt/mem.rs

@@ -1,4 +1,4 @@
-use crate::mem::{pa, MemRegion, PhysAddr};
+use crate::mem::MemRegion;
 use page_table_entry::{aarch64::A64PTE, GenericPTE, MappingFlags};
 
 /// Returns platform-specific memory regions.

modules/axhal/src/platform/aarch64_qemu_virt/mp.rs

@@ -1,4 +1,4 @@
-use crate::mem::{va, virt_to_phys, PhysAddr, VirtAddr};
+use crate::mem::{virt_to_phys, PhysAddr};
 
 /// Starts the given secondary CPU with its boot stack.
 pub fn start_secondary_cpu(cpu_id: usize, stack_top: PhysAddr) {

modules/axhal/src/platform/aarch64_raspi/mem.rs

@@ -1,4 +1,4 @@
-use crate::mem::*;
+use crate::mem::{MemRegion, MemRegionFlags};
 use page_table_entry::{aarch64::A64PTE, GenericPTE, MappingFlags};
 
 /// Returns platform-specific memory regions.
@@ -17,7 +17,6 @@ pub(crate) unsafe fn init_boot_page_table(
     boot_pt_l0: *mut [A64PTE; 512],
     boot_pt_l1: *mut [A64PTE; 512],
 ) {
-    use memory_addr::pa;
     let boot_pt_l0 = &mut *boot_pt_l0;
     let boot_pt_l1 = &mut *boot_pt_l1;
     // 0x0000_0000_0000 ~ 0x0080_0000_0000, table

modules/axhal/src/platform/aarch64_raspi/mp.rs

@@ -1,4 +1,4 @@
-use crate::mem::{pa, phys_to_virt, va, virt_to_phys, PhysAddr, VirtAddr};
+use crate::mem::{phys_to_virt, virt_to_phys, PhysAddr};
 
 static mut SECONDARY_STACK_TOP: usize = 0;
 

modules/axhal/src/platform/riscv64_qemu_virt/mp.rs

@@ -1,4 +1,4 @@
-use crate::mem::{va, virt_to_phys, PhysAddr, VirtAddr};
+use crate::mem::{virt_to_phys, PhysAddr};
 
 /// Starts the given secondary CPU with its boot stack.
 pub fn start_secondary_cpu(hartid: usize, stack_top: PhysAddr) {

modules/axhal/src/platform/riscv64_qemu_virt/time.rs

@@ -39,7 +39,7 @@ pub(super) fn init_early() {
     #[cfg(feature = "rtc")]
     if axconfig::RTC_PADDR != 0 {
         use crate::mem::phys_to_virt;
-        use memory_addr::{pa, PhysAddr};
+        use memory_addr::PhysAddr;
         use riscv_goldfish::Rtc;
 
         const GOLDFISH_BASE: PhysAddr = pa!(axconfig::RTC_PADDR);

modules/axhal/src/platform/x86_pc/apic.rs

@@ -2,7 +2,7 @@
 
 use kspin::SpinNoIrq;
 use lazyinit::LazyInit;
-use memory_addr::{pa, PhysAddr};
+use memory_addr::PhysAddr;
 use x2apic::ioapic::IoApic;
 use x2apic::lapic::{xapic_base, LocalApic, LocalApicBuilder};
 use x86_64::instructions::port::Port;

modules/axhal/src/platform/x86_pc/mem.rs

@@ -1,6 +1,6 @@
 // TODO: get memory regions from multiboot info.
 
-use crate::mem::{pa, MemRegion, MemRegionFlags};
+use crate::mem::{MemRegion, MemRegionFlags};
 
 /// Returns platform-specific memory regions.
 pub(crate) fn platform_regions() -> impl Iterator<Item = MemRegion> {

modules/axhal/src/platform/x86_pc/mp.rs

@@ -1,4 +1,4 @@
-use crate::mem::{pa, phys_to_virt, PhysAddr, PAGE_SIZE_4K};
+use crate::mem::{phys_to_virt, PhysAddr, PAGE_SIZE_4K};
 use crate::time::{busy_wait, Duration};
 
 const START_PAGE_IDX: u8 = 6;

modules/axruntime/src/mp.rs

@@ -1,7 +1,8 @@
-use axconfig::{SMP, TASK_STACK_SIZE};
-use axhal::mem::{va, virt_to_phys};
 use core::sync::atomic::{AtomicUsize, Ordering};
 
+use axconfig::{SMP, TASK_STACK_SIZE};
+use axhal::mem::{virt_to_phys, VirtAddr};
+
 #[link_section = ".bss.stack"]
 static mut SECONDARY_BOOT_STACK: [[u8; TASK_STACK_SIZE]; SMP - 1] = [[0; TASK_STACK_SIZE]; SMP - 1];
 
@@ -11,7 +12,7 @@ pub fn start_secondary_cpus(primary_cpu_id: usize) {
     let mut logic_cpu_id = 0;
     for i in 0..SMP {
         if i != primary_cpu_id {
-            let stack_top = virt_to_phys(va!(unsafe {
+            let stack_top = virt_to_phys(VirtAddr::from(unsafe {
                 SECONDARY_BOOT_STACK[logic_cpu_id].as_ptr_range().end as usize
             }));
 

modules/axtask/src/api.rs

@@ -7,6 +7,8 @@ pub(crate) use crate::run_queue::{AxRunQueue, RUN_QUEUE};
 #[doc(cfg(feature = "multitask"))]
 pub use crate::task::{CurrentTask, TaskId, TaskInner};
 #[doc(cfg(feature = "multitask"))]
+pub use crate::task_ext::{TaskExtMut, TaskExtRef};
+#[doc(cfg(feature = "multitask"))]
 pub use crate::wait_queue::WaitQueue;
 
 /// The reference type of a task.
@@ -87,16 +89,21 @@ pub fn on_timer_tick() {
     RUN_QUEUE.lock().scheduler_timer_tick();
 }
 
+/// Adds the given task to the run queue, returns the task reference.
+pub fn spawn_task(task: TaskInner) -> AxTaskRef {
+    let task_ref = task.into_arc();
+    RUN_QUEUE.lock().add_task(task_ref.clone());
+    task_ref
+}
+
 /// Spawns a new task with the given parameters.
 ///
 /// Returns the task reference.
 pub fn spawn_raw<F>(f: F, name: String, stack_size: usize) -> AxTaskRef
 where
     F: FnOnce() + Send + 'static,
 {
-    let task = TaskInner::new(f, name, stack_size);
-    RUN_QUEUE.lock().add_task(task.clone());
-    task
+    spawn_task(TaskInner::new(f, name, stack_size))
 }
 
 /// Spawns a new task with the default parameters.

modules/axtask/src/lib.rs

@@ -28,6 +28,10 @@
 #![cfg_attr(not(test), no_std)]
 #![feature(doc_cfg)]
 #![feature(doc_auto_cfg)]
+#![feature(linkage)]
+#![feature(const_mut_refs)]
+#![feature(const_ptr_is_null)]
+#![feature(const_unsafecell_get_mut)]
 
 #[cfg(test)]
 mod tests;
@@ -40,6 +44,7 @@ cfg_if::cfg_if! {
 
         mod run_queue;
         mod task;
+        mod task_ext;
         mod api;
         mod wait_queue;
 

modules/axtask/src/run_queue.rs

@@ -24,7 +24,7 @@ pub(crate) struct AxRunQueue {
 
 impl AxRunQueue {
     pub fn new() -> SpinNoIrq<Self> {
-        let gc_task = TaskInner::new(gc_entry, "gc".into(), axconfig::TASK_STACK_SIZE);
+        let gc_task = TaskInner::new(gc_entry, "gc".into(), axconfig::TASK_STACK_SIZE).into_arc();
         let mut scheduler = Scheduler::new();
         scheduler.add_task(gc_task);
         SpinNoIrq::new(Self { scheduler })
@@ -214,21 +214,24 @@ fn gc_entry() {
 }
 
 pub(crate) fn init() {
+    // Create the `idle` task (not current task).
     const IDLE_TASK_STACK_SIZE: usize = 4096;
     let idle_task = TaskInner::new(|| crate::run_idle(), "idle".into(), IDLE_TASK_STACK_SIZE);
     IDLE_TASK.with_current(|i| {
-        i.init_once(idle_task.clone());
+        i.init_once(idle_task.into_arc());
     });
 
-    let main_task = TaskInner::new_init("main".into());
+    // Put the subsequent execution into the `main` task.
+    let main_task = TaskInner::new_init("main".into()).into_arc();
     main_task.set_state(TaskState::Running);
+    unsafe { CurrentTask::init_current(main_task) };
 
     RUN_QUEUE.init_once(AxRunQueue::new());
-    unsafe { CurrentTask::init_current(main_task) }
 }
 
 pub(crate) fn init_secondary() {
-    let idle_task = TaskInner::new_init("idle".into());
+    // Put the subsequent execution into the `idle` task.
+    let idle_task = TaskInner::new_init("idle".into()).into_arc();
     idle_task.set_state(TaskState::Running);
     IDLE_TASK.with_current(|i| {
         i.init_once(idle_task.clone());