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Lucas/find all jtags #649
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In the end we want the FPGAs to connect to a host PC and send data
`display_level` and `display_source`
This test programs all FPGAs with a design that continuously transmits its DNA over the available UART interface. Then we check for each uart interface if we receive the correct DNA.
Continuously transmits DNA over uart
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Make sure we know which JTAG device belongs to which FPGA
So far we've found:
The connection of
1-5.3:1
, which based on elimination should belong to210308B0AE65
seems to be broken though.As next step we might want a CI check that verifies that these USB locations match the with the FPGA IDs, but that is impeded by #648 and presumably low priority