CL/aarch64: implement the wasm SIMD pseudo-max/min and FP-rounding in… #2312
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…structions
This patch implements, for aarch64, the following wasm SIMD extensions
Floating-point rounding instructions
WebAssembly/simd#232
Pseudo-Minimum and Pseudo-Maximum instructions
WebAssembly/simd#122
The changes are straightforward:
build.rs
: the relevant tests have been enabledcranelift/codegen/meta/src/shared/instructions.rs
: new CLIF instructionsfmin_pseudo
andfmax_pseudo
. The wasm rounding instructions do not needany new CLIF instructions.
cranelift/wasm/src/code_translator.rs
: translation into CLIF; this ispretty much the same as any other unary or binary vector instruction (for
the rounding and the pmin/max respectively)
cranelift/codegen/src/isa/aarch64/lower_inst.rs
:fmin_pseudo
andfmax_pseudo
are converted into a two instructionsequence,
fcmpgt
followed bybsl
frint{n,z,p,m}
instruction.cranelift/codegen/src/isa/aarch64/inst/mod.rs
: minor extension ofpub enum VecMisc2
to handle the rounding operations. And correspondingemit
cases.