Commits on Oct 26, 2020

1. CL/aarch64: implement the wasm SIMD pseudo-max/min and FP-rounding in… …

   …structions
   
   This patch implements, for aarch64, the following wasm SIMD extensions
   
     Floating-point rounding instructions
     WebAssembly/simd#232
   
     Pseudo-Minimum and Pseudo-Maximum instructions
     WebAssembly/simd#122
   
   The changes are straightforward:
   
   * `build.rs`: the relevant tests have been enabled
   
   * `cranelift/codegen/meta/src/shared/instructions.rs`: new CLIF instructions
     `fmin_pseudo` and `fmax_pseudo`.  The wasm rounding instructions do not need
     any new CLIF instructions.
   
   * `cranelift/wasm/src/code_translator.rs`: translation into CLIF; this is
     pretty much the same as any other unary or binary vector instruction (for
     the rounding and the pmin/max respectively)
   
   * `cranelift/codegen/src/isa/aarch64/lower_inst.rs`:
     - `fmin_pseudo` and `fmax_pseudo` are converted into a two instruction
       sequence, `fcmpgt` followed by `bsl`
     - the CLIF rounding instructions are converted to a suitable vector
       `frint{n,z,p,m}` instruction.
   
   * `cranelift/codegen/src/isa/aarch64/inst/mod.rs`: minor extension of `pub
     enum VecMisc2` to handle the rounding operations.  And corresponding `emit`
     cases.

   

   julian-seward1 committed Oct 26, 2020
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