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Merge dev-msft -> dev-integrate #393
Commits on Nov 5, 2023
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Extend new APB defines in integration document
Follow-up to #279. Signed-off-by: Steven Bellock <[email protected]>
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Commits on Nov 10, 2023
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Spec update with synthesis warnings and jtag tck requirement
Kiran Upadhyayula committedNov 10, 2023 Configuration menu - View commit details
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Commits on Nov 13, 2023
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Kiran Upadhyayula committed
Nov 13, 2023 Configuration menu - View commit details
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Kiran Upadhyayula committed
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Remove accidentally placed description
Kiran Upadhyayula committedNov 13, 2023 Configuration menu - View commit details
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Merge pull request #292 from chipsalliance/kupadhyayula-msft-integ-sp…
…ec-update Spec update with synthesis warnings and jtag tck requirement
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Commits on Nov 21, 2023
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Commits on Nov 23, 2023
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Commits on Nov 24, 2023
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Merge pull request #2 from ludwigatlubis/hmac_drbg
updated property suite in hmac_drbg folder
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Merge pull request #3 from ludwigatlubis/ecc
Added formal folder with readme and pdf
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Merge pull request #4 from ludwigatlubis/sha512_masked
Sha512 masked
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Commits on Nov 28, 2023
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Merge pull request #309 from chipsalliance/stephm-newdoc
initial markdown conversion of hardware spec
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Commits on Dec 1, 2023
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Merge pull request #299 from chipsalliance/dev-integrate
Merge dev-integrate -> main
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Merge pull request #320 from chipsalliance/main
Reintegrate main -> dev-msft
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Commits on Dec 4, 2023
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Commits on Dec 5, 2023
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Merge pull request #313 from ludwigatlubis/main
[FV] Adding ECC, DOE, HMAC_DRBG and SHA512_masked formal Assertion IP
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Commits on Dec 7, 2023
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Merge pull request #327 from chipsalliance/stephm-hwspec-images
initial hwspec images
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Commits on Dec 8, 2023
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APB defines are not meant to be user-configurable. Signed-off-by: Steven Bellock <[email protected]>
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Merge pull request #343 from chipsalliance/cwhitehead-msft-342
Hardware Specification Headings
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Commits on Dec 9, 2023
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Merge pull request #344 from chipsalliance/cwhitehead-msft-341
Update doc versions and release notes for 1.0-rc2 version
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Merge pull request #285 from steven-bellock/update-apb
Extend new APB defines in integration document
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Commits on Dec 11, 2023
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Update CaliptraIntegrationSpecification.md
Clarifying backend convergence statement in integration requirements
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Commits on Dec 12, 2023
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Update CaliptraIntegrationSpecification.md
Adding bootfsm brkpoint information
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Update CaliptraIntegrationSpecification.md
Removing hyphens for consistency
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Merge pull request #349 from chipsalliance/Nitsirks-patch-1
Update CaliptraIntegrationSpecification.md
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Commits on Dec 13, 2023
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Merge pull request #353 from chipsalliance/main
Reintegrate main -> dev-msft
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Commits on Dec 14, 2023
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Clean up document TODOs (#345)
* Typo fix * Resolve several TODO's by adding correct links * Remove mailbox regs; clarify table of interrupt vectors * Point to internal-regs in HW spec since describing Caliptra internal functionality * Regenerate image from source to fix text * Remove Fig. 18 TODO after updating img file * Update heading link to eTRNG API section and remove TODO * Fix syntax error on internal heading link * Grammar: present tense * Remove loaded 'official' term * Caliptra RTL -> 'the RTL', better link to caliptra_defines.h * More concise, informative verbiage on link to mbox_csr * Full link name to mbox_csr for clarity
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Commits on Dec 15, 2023
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* remove profile for 1.0 * update figure numbers and minor text change
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Commits on Dec 20, 2023
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Specify TRNG timing requirement (#361)
* Specify TRNG timing requirement * Address #136 * Applied editorial feedback
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Commits on Jan 2, 2024
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Commits on Jan 10, 2024
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Commits on Jan 13, 2024
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Fix usage of RISC-V toolchain (#377)
* Ensure that RISCV toolchain is installed Internal-tag: [#53530] Signed-off-by: Robert Szczepanski <[email protected]> * Use recommended RISC-V Toolchain in CI Internal-tag: [#53530] Signed-off-by: Robert Szczepanski <[email protected]> * Determine RISC-V toolchain version in GDB tests Internal-tag: [#53530] Signed-off-by: Robert Szczepanski <[email protected]> * Use more generic RISC-V toolchain references in README Internal-tag: [#53530] Signed-off-by: Robert Szczepanski <[email protected]> --------- Signed-off-by: Robert Szczepanski <[email protected]>
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Commits on Jan 16, 2024
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Add RTL file list to be modified by integrators (#372)
* Add table to describe integrator/vendor module overrides * relative path fix * Add soc_ifc_pkg as file to modify * Clarification on procedure for overriding native clock gate module * Punctuation * Change a word * Formatting * Clarified description of file modifications to be done by integrators * hyphenate process-specific * Add macro for RV core custom clock gating module * Grammar updates from review * Commas
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Commits on Jan 18, 2024
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CI: use risc-v gcc 12.1.0 (#384)
The toolchain is hosted in the https://github.com/chipsalliance/caliptra-tools repository Signed-off-by: Karol Gugala <[email protected]>
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updated ECC keygen TVLA documentation (#381)
* updated ECC keygen TVLA documentation * resolved the comments * updated tvla png name
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Typo fix on release date (#387)
* Typo fix, release date same as file update date
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Merge pull request #388 from chipsalliance/main
Reintegrate main -> dev-msft
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Commits on Jan 19, 2024
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Merged PR 137951: Increase ROM nightly regression timeout from 12 to …
…24 hours Increase ROM nightly regression timeout from 12 to 24 hours Related work items: #602523
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Merged PR 138140: Add delay to let KV writes finish before clear_secr…
…ets reg is modified Delay to let KV writes finish on all clients before clear_secrets reg is programmed to avoid reg update issues in UVM Related work items: #602886
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Merged PR 138250: Patch for QVIP failure due to soc ifc arb perf bug
updating wait state count to 67 to accommodate perf bug in soc ifc arb Wait state count worst case can last for two entire block reads from mailbox during the first/second block reads that occur with 2 clock delay (32 + 2 + 32 + 1) two full block reads, 2 clock delay between, and 1 clock delay for SRAM read. Related work items: #603171
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Merged PR 138791: [UVM] Fix a prediction bug that results in missed '…
…expected' txn Resolve UVM prediction bug by calculating if txn is expected closer to performing the reset prediction. This catches a missing 'expected' signal transition on mailbox_data_avail during a reset edge case. Related work items: #604229
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Merged PR 138845: Filesystem merge from caliptra-rtl GitHub to MSFT i…
…nternal Manual file-copy sync from GH 'dev-msft' to MSFT internal repo. Capture 1.0-rc2 updates for internal regressions. Related work items: #604278
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Merged PR 140496: [UVM] Testcase enhancements
Add updates to improve code coverage in UVM regressions: - Add extended checking in UVM regressions that throw errors for unexpected error interrupts from the SOC_IFC block (previously, the interrupts were serviced without being checked for context). - Add randomization constraints to make interesting test values on PAUSER more likely to occur - Update coverpoints for the RISC-V (VeeR) ECC error signals Related work items: #608192
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Merged PR 140812: [UVM] Fix for stale error report during rst sequence
Demote UVM_ERROR to UVM_INFO on unexpected transactions between cptra_rst_b->cptra_noncore_rst_b (this is a legal scenario) Related work items: #608843
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Merged PR 141156: Delayed prediction for clear_secrets reg
Updates to UVM to delay KV clear by 1 clk when clear_secrets reg is set Updates to sequence to turn on scan mode, perform writes and then turn off scan mode Related work items: #609997
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Merged PR 141380: [SVA] Add assertions for bus-idle condition during …
…fw upd rst Add assertions for bus-idle condition during fw upd rst Related work items: #610696
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Merged PR 141389: Reenable cg tests in L0 regression
Reenable cg tests in L0 regression Related work items: #610712
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Merged PR 142708: [Regression] Logging and disk space fixups
Disable verbose trace logs by default to reduce disk requirement for regressions Also fix a typo in an assertion error message Related work items: #611074, #613438
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Merge pull request #389 from chipsalliance/dev-msft-20230118
Dev msft 20240118
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