Skip to content

Issues: chipsalliance/sv-tests

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort

Issues list

Adding opl3_fpga to cores
#5804 opened Jun 9, 2024 by hzeller
Adding svase to tools
#5018 opened Sep 18, 2023 by hzeller
Create anchor for sub-tables
#3149 opened Aug 22, 2022 by hzeller
Include column sorting option in URL
#3140 opened Aug 22, 2022 by hzeller
projf-explore tests are not complete cose
#1870 opened Nov 27, 2021 by wsnyder
Add wav-lpddr-hw to sv-tests
#1723 opened Aug 26, 2021 by alaindargelas
Pull request "Compared test results" small feature requests enhancement New feature or request good first issue Good for newcomers
#1346 opened Feb 16, 2021 by mithro
7 tasks
Add RedPitaya to cores import-testsuite Request to import some suite of (System)Verilog code to third_party/ and run.
#970 opened Jul 28, 2020 by hzeller
Import XilinxUnisimLibrary as a test suite? import-testsuite Request to import some suite of (System)Verilog code to third_party/ and run.
#903 opened Jun 30, 2020 by mithro
Publish the history of the reports somewhere enhancement New feature or request
#771 opened Apr 21, 2020 by mithro
ProTip! Mix and match filters to narrow down what you’re looking for.