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Allow constant propagation of Vector.Zero. #65028

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7aca5dc
Initial work
TIHan Dec 16, 2021
2752913
Added a comma to display
TIHan Dec 16, 2021
526e6c8
Cleanup
TIHan Dec 16, 2021
d850426
Fixing build
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0ee6450
More cleanup
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TIHan Dec 17, 2021
5c1997f
Added CompareEqual Vector64/128 with Zero tests
TIHan Jan 4, 2022
b33c72c
Merge remote-tracking branch 'upstream/main' into vector-64-128-zero-…
TIHan Jan 4, 2022
fd19fdc
Do not contain op1 for now
TIHan Jan 4, 2022
178ff52
Wrong intrinsic id used
TIHan Jan 5, 2022
c0a23c0
Removing generated tests
TIHan Jan 6, 2022
ad780ea
Removing generated tests
TIHan Jan 6, 2022
83c26ab
Added CompareEqual tests
TIHan Jan 6, 2022
9f7e7da
Supporting containment for first operand
TIHan Jan 6, 2022
1e67415
Fix test build
TIHan Jan 6, 2022
25b9d92
Passing correct register
TIHan Jan 6, 2022
c0dc7e4
Check IsVectorZero before not allocing a register
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1f45fa2
Fixing test
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cb872da
Minor format change
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c0708d7
Fixed formatting
TIHan Jan 7, 2022
bf49d11
Renamed test
TIHan Jan 8, 2022
bc7a557
Adding AdvSimd_Arm64 tests:
TIHan Jan 10, 2022
5939f36
Adding support for rest of 'cmeq' and 'fcmeq' instructions
TIHan Jan 10, 2022
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2b30421
Minor test fix
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0828de6
Fixed tests
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Fix print
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Minor format change
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Fixing test
TIHan Jan 11, 2022
760a08c
Initial commit for Vector.Create to Vector.Zero normalization
TIHan Jan 14, 2022
c1a90b4
Added some emitter tests
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Feedback
TIHan Jan 19, 2022
b08f552
Update emitarm64.cpp
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Merge branch 'vector-64-128-zero-arm64-opts1' of github.com:TIHan/run…
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Merge branch 'vector-64-128-zero-arm64-opts1' into vector-64-128-256-…
TIHan Jan 19, 2022
77c3d25
Merge remote-tracking branch 'upstream' into vector-64-128-256-Create…
TIHan Jan 20, 2022
b1065e8
Handling variations of Vector.Create
TIHan Jan 20, 2022
451f8e3
Use Operands iterator instead of edges
TIHan Jan 20, 2022
e231131
Fix condition
TIHan Jan 20, 2022
64ad95f
Simplify
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333fc67
format
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bc02904
Fixed IsFloatPositiveZero
TIHan Jan 21, 2022
d8c39e3
Uncomment
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Merging
TIHan Jan 21, 2022
38d9e7e
Updated tests to include Vector64.Create/Vector128.Create for ARM64
TIHan Jan 21, 2022
fb6047c
Making implementation of IsFloatPositiveZero explicit
TIHan Jan 21, 2022
bc1b9f4
Update src/coreclr/jit/gentree.cpp
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377b794
Do not perform optimization when VN CSE phase
TIHan Jan 24, 2022
1cf0b32
use ResetHWIntrinsicId
TIHan Jan 25, 2022
84f51cd
Assert !optValnumCSE_phase
TIHan Jan 25, 2022
31cd50d
Simplify IsVectorZero
TIHan Jan 25, 2022
383f147
Simplify IsVectorZero
TIHan Jan 25, 2022
29fb977
Simplify some uses of Vector*_get_Zero
TIHan Jan 25, 2022
51eae5a
Added another test
TIHan Jan 25, 2022
7d06ebf
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177cd53
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TIHan Jan 25, 2022
32ac1fc
Merge remote-tracking branch 'upstream/main' into vector-64-128-256-C…
TIHan Feb 7, 2022
feed738
Initial work for optimizations on VectorZero value numbering
TIHan Feb 8, 2022
9840c5b
Allowing all Vector.Zero to be constant prop'ed. Added VNFuncSimdType…
TIHan Feb 8, 2022
36c4001
Update gentree.h
TIHan Feb 8, 2022
fc28677
Merge branch 'vector-64-128-256-Create-to-get_Zero' into vec-zero-vn
TIHan Feb 8, 2022
b074f09
Quick rename
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2331a6e
Removed extra variable
TIHan Feb 8, 2022
f0d1ecc
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b15036f
Format
TIHan Feb 8, 2022
d27d877
Fixed vnDumpSimdType to take into account CorInfoType
TIHan Feb 9, 2022
e48ad65
Fixed gtNewSimdZeroNode to produce the right Vector*_get_Zero based o…
TIHan Feb 9, 2022
da48e4e
Formatting
TIHan Feb 10, 2022
3785e34
Feedback and a loop test
TIHan Feb 11, 2022
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Added another test. Formatting fixes
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b1c44cf
Added GetSimdBaseJitPreciseType
TIHan Feb 11, 2022
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Merge remote-tracking branch 'upstream/main' into vector-64-128-256-C…
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Merge branch 'vector-64-128-256-Create-to-get_Zero' into vec-zero-vn
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25 changes: 22 additions & 3 deletions src/coreclr/jit/assertionprop.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2882,8 +2882,8 @@ GenTree* Compiler::optVNConstantPropOnTree(BasicBlock* block, GenTree* tree)
ValueNumPair vnPair = tree->gtVNPair;
ValueNum vnCns = vnStore->VNConservativeNormalValue(vnPair);

// Check if node evaluates to a constant.
if (!vnStore->IsVNConstant(vnCns))
// Check if node evaluates to a constant or Vector.Zero.
if (!vnStore->IsVNConstant(vnCns) && !vnStore->IsVNVectorZero(vnCns))
{
return nullptr;
}
Expand Down Expand Up @@ -3042,6 +3042,24 @@ GenTree* Compiler::optVNConstantPropOnTree(BasicBlock* block, GenTree* tree)
}
break;

#if FEATURE_HW_INTRINSICS
case TYP_SIMD8:
case TYP_SIMD12:
case TYP_SIMD16:
case TYP_SIMD32:
{
assert(vnStore->IsVNVectorZero(vnCns));
VNSimdTypeInfo vnInfo = vnStore->GetVectorZeroSimdTypeOfVN(vnCns);

assert(vnInfo.m_simdBaseJitType != CORINFO_TYPE_UNDEF);
assert(vnInfo.m_simdSize != 0);
assert(getSIMDTypeForSize(vnInfo.m_simdSize) == vnStore->TypeOfVN(vnCns));

conValTree = gtNewSimdZeroNode(tree->TypeGet(), vnInfo.m_simdBaseJitType, vnInfo.m_simdSize, true);
}
break;
#endif

case TYP_BYREF:
// Do not support const byref optimization.
break;
Expand Down Expand Up @@ -5449,7 +5467,8 @@ struct VNAssertionPropVisitorInfo
//
GenTree* Compiler::optExtractSideEffListFromConst(GenTree* tree)
{
assert(vnStore->IsVNConstant(vnStore->VNConservativeNormalValue(tree->gtVNPair)));
assert(vnStore->IsVNConstant(vnStore->VNConservativeNormalValue(tree->gtVNPair)) ||
vnStore->IsVNVectorZero(vnStore->VNConservativeNormalValue(tree->gtVNPair)));

GenTree* sideEffList = nullptr;

Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/gentree.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -21499,7 +21499,7 @@ GenTree* Compiler::gtNewSimdZeroNode(var_types type,
#if defined(TARGET_XARCH)
intrinsic = (simdSize == 32) ? NI_Vector256_get_Zero : NI_Vector128_get_Zero;
#elif defined(TARGET_ARM64)
intrinsic = (simdSize == 16) ? NI_Vector128_get_Zero : NI_Vector64_get_Zero;
intrinsic = (simdSize > 8) ? NI_Vector128_get_Zero : NI_Vector64_get_Zero;
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#else
#error Unsupported platform
#endif // !TARGET_XARCH && !TARGET_ARM64
Expand Down
28 changes: 28 additions & 0 deletions src/coreclr/jit/gentree.h
Original file line number Diff line number Diff line change
Expand Up @@ -5323,6 +5323,34 @@ struct GenTreeJitIntrinsic : public GenTreeMultiOp
return (CorInfoType)gtSimdBaseJitType;
}

CorInfoType GetNormalizedSimdBaseJitType() const
{
CorInfoType simdBaseJitType = GetSimdBaseJitType();
switch (simdBaseJitType)
{
case CORINFO_TYPE_NATIVEINT:
{
#ifdef TARGET_64BIT
return CORINFO_TYPE_LONG;
#else
return CORINFO_TYPE_INT;
#endif
}

case CORINFO_TYPE_NATIVEUINT:
{
#ifdef TARGET_64BIT
return CORINFO_TYPE_ULONG;
#else
return CORINFO_TYPE_UINT;
#endif
}

default:
return simdBaseJitType;
}
}

void SetSimdBaseJitType(CorInfoType simdBaseJitType)
{
gtSimdBaseJitType = (unsigned char)simdBaseJitType;
Expand Down
13 changes: 10 additions & 3 deletions src/coreclr/jit/liveness.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2066,16 +2066,23 @@ void Compiler::fgComputeLifeLIR(VARSET_TP& life, BasicBlock* block, VARSET_VALAR
case GT_PUTARG_STK:
case GT_IL_OFFSET:
case GT_KEEPALIVE:
#ifdef FEATURE_HW_INTRINSICS
case GT_HWINTRINSIC:
#endif // FEATURE_HW_INTRINSICS
// Never remove these nodes, as they are always side-effecting.
//
// NOTE: the only side-effect of some of these nodes (GT_CMP, GT_SUB_HI) is a write to the flags
// register.
// Properly modeling this would allow these nodes to be removed.
break;

#ifdef FEATURE_HW_INTRINSICS
case GT_HWINTRINSIC:
// Conservative: This only removes Vector.Zero nodes, but could be expanded.
if (node->IsVectorZero())
{
fgTryRemoveNonLocal(node, &blockRange);
}
break;
#endif // FEATURE_HW_INTRINSICS

case GT_NOP:
{
// NOTE: we need to keep some NOPs around because they are referenced by calls. See the dead store
Expand Down
124 changes: 116 additions & 8 deletions src/coreclr/jit/valuenum.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1888,7 +1888,7 @@ ValueNum ValueNumStore::VNZeroForType(var_types typ)
// "fully zeroed" vectors, and here we may be loading one from memory, leaving upper
// bits undefined. So using "SIMD_Init" is "the next best thing", so to speak, and
// TYP_FLOAT is one of the more popular base types, so that's why we use it here.
return VNForFunc(typ, VNF_SIMD_Init, VNForFloatCon(0), VNForSimdType(genTypeSize(typ), TYP_FLOAT));
return VNForFunc(typ, VNF_SIMD_Init, VNForFloatCon(0), VNForSimdType(genTypeSize(typ), CORINFO_TYPE_FLOAT));
#endif // FEATURE_SIMD

// These should be unreached.
Expand Down Expand Up @@ -1935,9 +1935,9 @@ ValueNum ValueNumStore::VNOneForType(var_types typ)
}

#ifdef FEATURE_SIMD
ValueNum ValueNumStore::VNForSimdType(unsigned simdSize, var_types simdBaseType)
ValueNum ValueNumStore::VNForSimdType(unsigned simdSize, CorInfoType simdBaseJitType)
{
ValueNum baseTypeVN = VNForIntCon(INT32(simdBaseType));
ValueNum baseTypeVN = VNForIntCon(INT32(simdBaseJitType));
ValueNum sizeVN = VNForIntCon(simdSize);
ValueNum simdTypeVN = VNForFunc(TYP_REF, VNF_SimdType, sizeVN, baseTypeVN);

Expand Down Expand Up @@ -4594,6 +4594,114 @@ bool ValueNumStore::IsVNConstant(ValueNum vn)
}
}

//------------------------------------------------------------------------
// IsVNVectorZero: Checks if the value number is a Vector*_get_Zero.
//
// Arguments:
// vn - The value number.
//
// Return Value:
// true - The value number is a Vector*_get_Zero.
// false - The value number is not a Vector*_get_Zero.
bool ValueNumStore::IsVNVectorZero(ValueNum vn)
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{
#ifdef FEATURE_SIMD
VNSimdTypeInfo vnInfo = GetVectorZeroSimdTypeOfVN(vn);
// Check the size to see if we got a valid SIMD type.
// '0' means it is not valid.
if (vnInfo.m_simdSize != 0)
{
return true;
}
#endif
return false;
}

#ifdef FEATURE_SIMD
//------------------------------------------------------------------------
// GetSimdTypeOfVN: Returns the SIMD type information based on the given value number.
//
// Arguments:
// vn - The value number.
//
// Return Value:
// Returns VNSimdTypeInfo(0, CORINFO_TYPE_UNDEF) if the given value number has not been given a SIMD type.
VNSimdTypeInfo ValueNumStore::GetSimdTypeOfVN(ValueNum vn)
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{
VNSimdTypeInfo vnInfo;

// The SIMD type is encoded as a function,
// even though it is not actually a function.
VNFuncApp simdType;
if (GetVNFunc(vn, &simdType) && simdType.m_func == VNF_SimdType)
{
assert(simdType.m_arity == 2);
vnInfo.m_simdSize = GetConstantInt32(simdType.m_args[0]);
vnInfo.m_simdBaseJitType = (CorInfoType)GetConstantInt32(simdType.m_args[1]);
return vnInfo;
}

vnInfo.m_simdSize = 0;
vnInfo.m_simdBaseJitType = CORINFO_TYPE_UNDEF;
return vnInfo;
}

//------------------------------------------------------------------------
// GetVectorZeroSimdTypeOfVN: Returns the SIMD type information based on the given value number
// if it's Vector*_get_Zero.
//
// Arguments:
// vn - The value number.
//
// Return Value:
// Returns VNSimdTypeInfo(0, CORINFO_TYPE_UNDEF) if the given value number has not been given a SIMD type
// for a Vector*_get_Zero value number.
//
// REVIEW: Vector*_get_Zero nodes in VN currently encode their SIMD type for
// conservative reasons. In the future, it might be possible not do this
// on most platforms since Vector*_get_Zero's base type does not matter.
VNSimdTypeInfo ValueNumStore::GetVectorZeroSimdTypeOfVN(ValueNum vn)
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{
#ifdef FEATURE_HW_INTRINSICS
// REVIEW: This will only return true if Vector*_get_Zero encodes
// its base type as an argument. On XARCH there may be
// scenarios where Vector*_get_Zero will not encode its base type;
// therefore, returning false here.
// Vector*_get_Zero does not have any arguments,
// but its SIMD type is encoded as an argument.
VNFuncApp funcApp;
if (GetVNFunc(vn, &funcApp) && funcApp.m_arity == 1)
{
switch (funcApp.m_func)
{
case VNF_HWI_Vector128_get_Zero:
#if defined(TARGET_XARCH)
case VNF_HWI_Vector256_get_Zero:
#elif defined(TARGET_ARM64)
case VNF_HWI_Vector64_get_Zero:
#endif
{
return GetSimdTypeOfVN(funcApp.m_args[0]);
}

default:
{
VNSimdTypeInfo vnInfo;
vnInfo.m_simdSize = 0;
vnInfo.m_simdBaseJitType = CORINFO_TYPE_UNDEF;
return vnInfo;
}
}
}
#endif

VNSimdTypeInfo vnInfo;
vnInfo.m_simdSize = 0;
vnInfo.m_simdBaseJitType = CORINFO_TYPE_UNDEF;
return vnInfo;
}
#endif // FEATURE_SIMD

bool ValueNumStore::IsVNInt32Constant(ValueNum vn)
{
if (!IsVNConstant(vn))
Expand Down Expand Up @@ -6170,10 +6278,10 @@ void ValueNumStore::vnDumpSimdType(Compiler* comp, VNFuncApp* simdType)
assert(IsVNConstant(simdType->m_args[0]));
assert(IsVNConstant(simdType->m_args[1]));

int simdSize = ConstantValue<int>(simdType->m_args[0]);
var_types baseType = (var_types)ConstantValue<int>(simdType->m_args[1]);
int simdSize = ConstantValue<int>(simdType->m_args[0]);
CorInfoType baseJitType = (CorInfoType)ConstantValue<int>(simdType->m_args[1]);

printf("%s(simd%d, %s)", VNFuncName(simdType->m_func), simdSize, varTypeName(baseType));
printf("%s(simd%d, %s)", VNFuncName(simdType->m_func), simdSize, varTypeName(JitType2PreciseVarType(baseJitType)));
}
#endif // FEATURE_SIMD

Expand Down Expand Up @@ -9404,7 +9512,7 @@ void Compiler::fgValueNumberSimd(GenTreeSIMD* tree)

if (encodeResultType)
{
ValueNum simdTypeVN = vnStore->VNForSimdType(tree->GetSimdSize(), tree->GetSimdBaseType());
ValueNum simdTypeVN = vnStore->VNForSimdType(tree->GetSimdSize(), tree->GetNormalizedSimdBaseJitType());
resvnp.SetBoth(simdTypeVN);

#ifdef DEBUG
Expand Down Expand Up @@ -9519,7 +9627,7 @@ void Compiler::fgValueNumberHWIntrinsic(GenTreeHWIntrinsic* tree)

if (encodeResultType)
{
ValueNum simdTypeVN = vnStore->VNForSimdType(tree->GetSimdSize(), tree->GetSimdBaseType());
ValueNum simdTypeVN = vnStore->VNForSimdType(tree->GetSimdSize(), tree->GetNormalizedSimdBaseJitType());
resvnp.SetBoth(simdTypeVN);

#ifdef DEBUG
Expand Down
17 changes: 16 additions & 1 deletion src/coreclr/jit/valuenum.h
Original file line number Diff line number Diff line change
Expand Up @@ -184,6 +184,13 @@ struct VNFuncApp
}
};

// An instance of this struct represents the decoded information of a SIMD type from a value number.
struct VNSimdTypeInfo
{
unsigned int m_simdSize;
CorInfoType m_simdBaseJitType;
};

// We use a unique prefix character when printing value numbers in dumps: i.e. $1c0
// This define is used with string concatenation to put this in printf format strings
#define FMT_VN "$%x"
Expand Down Expand Up @@ -463,7 +470,7 @@ class ValueNumStore

#ifdef FEATURE_SIMD
// A helper function for constructing VNF_SimdType VNs.
ValueNum VNForSimdType(unsigned simdSize, var_types simdBaseType);
ValueNum VNForSimdType(unsigned simdSize, CorInfoType simdBaseJitType);
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#endif // FEATURE_SIMD

// Create or return the existimg value number representing a singleton exception set
Expand Down Expand Up @@ -714,6 +721,14 @@ class ValueNumStore
// Returns true iff the VN represents a (non-handle) constant.
bool IsVNConstant(ValueNum vn);

bool IsVNVectorZero(ValueNum vn);

#ifdef FEATURE_SIMD
VNSimdTypeInfo GetSimdTypeOfVN(ValueNum vn);

VNSimdTypeInfo GetVectorZeroSimdTypeOfVN(ValueNum vn);
#endif

// Returns true iff the VN represents an integer constant.
bool IsVNInt32Constant(ValueNum vn);

Expand Down
46 changes: 46 additions & 0 deletions src/tests/JIT/Regression/JitBlue/Runtime_33972/Runtime_33972.cs
Original file line number Diff line number Diff line change
Expand Up @@ -149,6 +149,46 @@ static Vector128<float> AdvSimd_CompareEqual_Vector128_Single_CreateZeroZeroZero
return AdvSimd.CompareEqual(left, asVar);
}

[MethodImpl(MethodImplOptions.NoInlining)]
static Vector128<float> AdvSimd_CompareEqual_Vector128_Single_CreateZeroZeroZeroZero_AsVariableLoop(Vector128<float> left)
{
Vector128<float> result = default;
var asVar = Vector128.Create(0f, 0f, 0f, 0f);
for (var i = 0; i < 4; i++)
{
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
for (var j = 0; j < 4; j++)
{
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
result = AdvSimd.CompareEqual(left, asVar);
}
}
return result;
}

[MethodImpl(MethodImplOptions.NoInlining)]
static unsafe Vector128<long> AdvSimd_Arm64_CompareEqual_Vector128_Long_AsVariableLoop(Vector128<long> left)
{
Vector128<long> result = default;
Vector128<long> asVar = Vector128.Create((long)0);
Vector128<nint> asVar2 = Vector128.Create((nint)0);
Vector128<long> asVar3 = asVar2.AsInt64();
for (var i = 0; i < 4; i++)
{
result = AdvSimd.Arm64.CompareEqual(left, asVar);
for (var j = 0; j < 4; j++)
{
result = AdvSimd.Arm64.CompareEqual(left, asVar3);
}
}
return result;
}

[MethodImpl(MethodImplOptions.NoInlining)]
static Vector128<double> AdvSimd_Arm64_CompareEqual_Vector128_Double_Zero(Vector128<double> left)
{
Expand Down Expand Up @@ -564,6 +604,9 @@ static int Tests_AdvSimd()
if (!ValidateResult_Vector128<float>(AdvSimd_CompareEqual_Vector128_Single_CreateZeroZeroZeroZero_AsVariable(Vector128<float>.Zero), Single.NaN))
result = -1;

if (!ValidateResult_Vector128<float>(AdvSimd_CompareEqual_Vector128_Single_CreateZeroZeroZeroZero_AsVariableLoop(Vector128<float>.Zero), Single.NaN))
result = -1;

// End CompareEqual Tests

// Begin CompareGreaterThan Tests
Expand Down Expand Up @@ -747,6 +790,9 @@ static int Tests_AdvSimd_Arm64()
if (!ValidateResult_Vector128<long>(AdvSimd_Arm64_CompareEqual_Vector128_Int64_Zero(Vector128<long>.Zero), -1))
result = -1;

if (!ValidateResult_Vector128<long>(AdvSimd_Arm64_CompareEqual_Vector128_Long_AsVariableLoop(Vector128<long>.Zero), -1))
result = -1;

// Vector64

if (!ValidateResult_Vector64<float>(AdvSimd_Arm64_CompareEqualScalar_Vector64_Single_Zero(Vector64<float>.Zero), Vector64.CreateScalar(Single.NaN)))
Expand Down