[RISC-V] fix rm field in riscvd instruction (dotnet#101908)

Changed rm from 1 to 0.
Fixed instructions:
- fcvt.d.w
- fcvt.w.d
- fcvt.d.wu
- fcvt.wu.d
- fcvt.d.s
- fcvt.s.d

src/coreclr/jit/instrsriscv64.h

@@ -205,8 +205,8 @@ INST(fmin_d,        "fmin.d",         0,   0x2a000053)
 INST(fmax_d,        "fmax.d",         0,   0x2a001053)
 
 //// R_R
-INST(fcvt_s_d,      "fcvt.s.d",       0,   0x40101053)
-INST(fcvt_d_s,      "fcvt.d.s",       0,   0x42001053)
+INST(fcvt_s_d,      "fcvt.s.d",       0,   0x40100053)
+INST(fcvt_d_s,      "fcvt.d.s",       0,   0x42000053)
 
 //// R_R_R
 INST(feq_d,         "feq.d",          0,   0xa2002053)
@@ -215,10 +215,10 @@ INST(fle_d,         "fle.d",          0,   0xa2000053)
 
 //// R_R
 INST(fclass_d,      "fclass.d",       0,   0xe2001053)
-INST(fcvt_w_d,      "fcvt.w.d",       0,   0xc2001053)
-INST(fcvt_wu_d,     "fcvt.wu.d",      0,   0xc2101053)
-INST(fcvt_d_w,      "fcvt.d.w",       0,   0xd2001053)
-INST(fcvt_d_wu,     "fcvt.d.wu",      0,   0xd2101053)
+INST(fcvt_w_d,      "fcvt.w.d",       0,   0xc2000053)
+INST(fcvt_wu_d,     "fcvt.wu.d",      0,   0xc2100053)
+INST(fcvt_d_w,      "fcvt.d.w",       0,   0xd2000053)
+INST(fcvt_d_wu,     "fcvt.d.wu",      0,   0xd2100053)
 
 //// R_R_I
 INST(flw,           "flw",            LD,  0x00002007)