v1.0rc1

sinara-hw · Oct 20, 2019 · f630f68 · f630f68
1 parent e0dc7f0
commit f630f68
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Showing 11 changed files with 39 additions and 2 deletions.
diff --git a/PCB/FPGA.Harness b/PCB/FPGA.Harness
@@ -0,0 +1,2 @@
+FPGA_CFG=CFG_RELOAD,CSBSEL0,CSBSEL1,FLASH_SDI,FLASH_SDO,FLASH_SCK,FLASH_SS,CDONE,CRESET
+I2C=SCL,SDA
diff --git a/PCB/FPGA_Config.Harness b/PCB/FPGA_Config.Harness
@@ -0,0 +1,2 @@
+FPGA_CFG=CFG_RELOAD,CSBSEL0,CSBSEL1,FLASH_SDI,FLASH_SDO,FLASH_SCK,FLASH_SS,CDONE,CRESET
+I2C=SCL,SDA
diff --git a/PCB/FPGA_LVDS.Harness b/PCB/FPGA_LVDS.Harness
@@ -0,0 +1 @@
+I2C=SDA,SCL
diff --git a/PCB/Fastino.PCBDOC b/PCB/Fastino.PCBDOC
diff --git a/PCB/Fastino.PrjPCB b/PCB/Fastino.PrjPCB
@@ -297,7 +297,39 @@ UniqueID=4E8EF4FA-1004-4098-BFB3-EC9401DFD915
 Description=STD
 AllowFabrication=0
 ParameterCount=0
-VariationCount=0
+VariationCount=32
+Variation1=Designator=L8_1|UniqueId=\1XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation2=Designator=L8_14|UniqueId=\14XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation3=Designator=L8_10|UniqueId=\10XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation4=Designator=L8_2|UniqueId=\2XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation5=Designator=L8_21|UniqueId=\21XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation6=Designator=L8_28|UniqueId=\28XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation7=Designator=L8_29|UniqueId=\29XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation8=Designator=L8_7|UniqueId=\7XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation9=Designator=L8_26|UniqueId=\26XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation10=Designator=L8_18|UniqueId=\18XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation11=Designator=L8_30|UniqueId=\30XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation12=Designator=L8_9|UniqueId=\9XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation13=Designator=L8_24|UniqueId=\24XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation14=Designator=L8_16|UniqueId=\16XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation15=Designator=L8_19|UniqueId=\19XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation16=Designator=L8_25|UniqueId=\25XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation17=Designator=L8_32|UniqueId=\32XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation18=Designator=L8_27|UniqueId=\27XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation19=Designator=L8_11|UniqueId=\11XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation20=Designator=L8_20|UniqueId=\20XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation21=Designator=L8_31|UniqueId=\31XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation22=Designator=L8_5|UniqueId=\5XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation23=Designator=L8_6|UniqueId=\6XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation24=Designator=L8_12|UniqueId=\12XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation25=Designator=L8_15|UniqueId=\15XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation26=Designator=L8_13|UniqueId=\13XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation27=Designator=L8_4|UniqueId=\4XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation28=Designator=L8_22|UniqueId=\22XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation29=Designator=L8_17|UniqueId=\17XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation30=Designator=L8_23|UniqueId=\23XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation31=Designator=L8_3|UniqueId=\3XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
+Variation32=Designator=L8_8|UniqueId=\8XGIDEBDC\PIFNAPCJ|Kind=1|AlternatePart= 
 ParamVariationCount=0
 
 [Configuration1]
@@ -1273,7 +1305,7 @@ CompClassManualRoomEnabled=0
 NetClassAutoBusEnabled=1
 NetClassAutoCompEnabled=0
 NetClassAutoNamedHarnessEnabled=0
-NetClassManualEnabled=0
+NetClassManualEnabled=1
 NetClassSeparateForBusSections=0
 
 [LibraryUpdateOptions]

diff --git a/PCB/Fastino.schdoc b/PCB/Fastino.schdoc
diff --git a/PCB/Fastino_DAC_channel.SchDoc b/PCB/Fastino_DAC_channel.SchDoc
diff --git a/PCB/Fastino_FPGA.SchDoc b/PCB/Fastino_FPGA.SchDoc
diff --git a/PCB/Fastino_References.SchDoc b/PCB/Fastino_References.SchDoc
diff --git a/PCB/Fastino_Supply.SchDoc b/PCB/Fastino_Supply.SchDoc
diff --git a/SIM_CALC/Fastino_Power_Budget.xlsx b/SIM_CALC/Fastino_Power_Budget.xlsx