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Fixes to Fastino V1.0 #71

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wants to merge 33 commits into from
Closed

Fixes to Fastino V1.0 #71

wants to merge 33 commits into from

Commits on Mar 2, 2020

  1. reduce ground-polygon clearance to 0.2 mm (issue sinara-hw#67)

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    pathfinder49 committed Mar 2, 2020
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  2. Ground IC3 housing (fix issue sinara-hw#53) 

    The second shield pin is intentionally floated.
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    pathfinder49 committed Mar 2, 2020
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  3. Tripple P/N12V0A capacitance (fix sinara-hw#54 & sinara-hw#69)

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    pathfinder49 committed Mar 2, 2020
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  4. Fix incorrect filter resisor pin-out in schematic (sinara-hw#42)

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    pathfinder49 committed Mar 2, 2020
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  5. Remove CMC from schematic (sinara-hw#65)

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    pathfinder49 committed Mar 2, 2020
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  6. Remove parallel DAC termination from schematic (sinara-hw#63)

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    pathfinder49 committed Mar 2, 2020
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Commits on Mar 3, 2020

  1. Rework DAC1 room layout (sinara-hw#42, sinara-hw#63, sinara-hw#65)

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    pathfinder49 committed Mar 3, 2020
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  2. apply revised channel layout to all channels

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    pathfinder49 committed Mar 3, 2020
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Commits on Mar 4, 2020

  1. Update power-planes and references for new channel layout

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    pathfinder49 committed Mar 4, 2020
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Commits on Mar 10, 2020

  1. Redo parallel termination with 15 pF, 0603 caps

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    pathfinder49 committed Mar 10, 2020
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Commits on Mar 11, 2020

  1. Connect dac outputs and start series termination layout

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    pathfinder49 committed Mar 11, 2020
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Commits on Mar 13, 2020

  1. Routed 1/3 DAC rows with series termination

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    pathfinder49 committed Mar 13, 2020
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  2. make more space for digital traces

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    pathfinder49 committed Mar 13, 2020
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Commits on Mar 16, 2020

  1. routed 2/3 DAC rows

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    pathfinder49 committed Mar 16, 2020
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Commits on Mar 17, 2020

  1. finished routing digital traces

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    pathfinder49 committed Mar 17, 2020
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  2. cleanup design rule violations

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    pathfinder49 committed Mar 17, 2020
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  3. fix P3V3_MP connection to EEM headers (sinara-hw#47)

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    pathfinder49 committed Mar 17, 2020
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  4. clean-up top and bottom overlay

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    pathfinder49 committed Mar 17, 2020
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Commits on Mar 18, 2020

  1. reudce series termination to 62 ohm 

    faster signal rise time
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    pathfinder49 committed Mar 18, 2020
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  2. Neasten layout & grounding

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    pathfinder49 committed Mar 18, 2020
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Commits on Mar 20, 2020

  1. Fix i2c (issue sinara-hw#48) 

    * lower R48 to 2k2
* connect IC10 directly to EEM0_I2C (before T6, T9)
* connect IC10 and config pins to P3V3_MP
    @pathfinder49
    pathfinder49 committed Mar 20, 2020
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Commits on Mar 30, 2020

  1. Increase N12V0A capacitor clearance

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    pathfinder49 committed Mar 30, 2020
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  2. modify one DAC channel with increased component clearance

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    pathfinder49 committed Mar 30, 2020
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  3. work increased clearance layout into all channels

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    pathfinder49 committed Mar 30, 2020
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  4. Add variant with DNP parallel termination caps.

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    pathfinder49 committed Mar 30, 2020
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Commits on Apr 4, 2020

  1. Supply the IC6 and JP1 from P3V3 in schematic

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    pathfinder49 committed Apr 4, 2020
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  2. Add polygon cutouts on L5&6 to remove antennas

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    pathfinder49 committed Apr 4, 2020
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  3. add polygon coutouts on L1 & L8 for better grounding control

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    pathfinder49 committed Apr 4, 2020
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  4. update ch1 layout according to feedback from sinara-hw#72

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    pathfinder49 committed Apr 4, 2020
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  5. via tenting & trace thickness

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    pathfinder49 committed Apr 4, 2020
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  6. Implement IC6 and JP1 P3V3 supply and switch C17 to P3V3

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    pathfinder49 committed Apr 4, 2020
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Commits on Apr 6, 2020

  1. apply updated layout to all channels

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    pathfinder49 committed Apr 6, 2020
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  2. more via tenting

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    pathfinder49 committed Apr 6, 2020
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