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Minutes20190129 Sayma v2

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Joe Britton edited this page Jan 31, 2019 · 2 revisions

Sayma v2 meeting number 5

  • Location: Google hangout
  • Date and time: 2019-01-29 13:30 UTC, start 13:35
  • Time and date poll: https://doodle.com/poll/yfurd7bd5iwt5pae; closed
  • Chair: Paweł Kulik
  • Minutes: Robert Jördens
  • Participants:
    • PK, Paweł Kulik
    • RJ, Robert Jördens
    • MS, Mikolaj Sowiński
    • TH, Tom Harty
    • JB, Joe Britton
    • SB, Sébastien Bourdeauducq
    • GK, Greg Kasprowicz

Agenda

1. Accept previous minutes

2. Status of Tom's ADF PLL tests

Links:

Discussion:

  • TH: Thorough write up
  • TH: Recommendation keep it, ADF4356 works roughly as expected but there are a few downsides. Given that it deosn't seem worth switching from the HMC830, agreement was to add a power cycler, that should fix all known issues afaict, as a backup plan, we should agree to: use an ADCLK948 mux, second input is routed to mmcx/ufl connectors add an idc with some gpio + power and a few mounting holes
  • TH: so, do we all agree to fix on the HMC830 + power cycler
  • TH: as a backup plan, we should agree to: use an ADCLK948 mux, second input is routed to mmcx/ufl connectors, add an idc with some gpio + power and a few mounting holes, that way one can either use an external clock or add a clock mezzanine
  • SB: Tom have you tested the HMC830 for the same phase instability issues that the ADF chip has? also, what is the level of those instabilities? I'm doing some tests with DAC synch now and getting interesting results, so, if there are issue swith the HMC stability, what level of precision should I be looking at?
  • GK asks whether that should be a mezzanine with ADF or other chip and connector. MMCX cheaper but no barrels, i.e. jumpers
  • TH: coax, idc, mounting holes is a emergency backup solution (that or just route something to a hole in the FP (coax pig tail) also a way of injecting an external clock, e.g. to debug any noise issues with the pll)
  • JB: External clock would be better as mezzanine.
  • TH: It's a prototype, mezzanine is mechanically difficult, just a stop gap.
  • Consensus: add MMCX, holes, power cycler, keep HMC830

3. Sebastien's HMC7043 tests

  • HMC7043 tests with higher frequencies
  • Problems with phase slips are gone after fixing setup code, multislip, single slip, digital delay, analog delays all work.
  • May also be fine for 600 MHz now that the SYSREF timer is correctly configured
  • Deterministic synchronization with Urukul and Kasli through DRTIO works, a t_SYSREF/2 non-determinism still present
  • Lots of diagnostics, self-tests and calibration added
  • SB wants confirmation experiments by others
  • TH defers to GK for measurements, difficult measurements, limited by non-diff probe and rise-time, won't be proper eye measurement and SI measurements
  • RJ asks whether all complaints about HMC7043 are resolved
  • SB doesn't see any remaining issue with HMC7043, no roadblocks, present solutions and work arounds presumably sufficient and tested
  • SB/TH: t_SYSREF/2 slips were also observed with custom sync at 2.4 GHz and may be a DAC setup issue or SI common to both approaches
  • TH: HMC7043+HMC830 stability was good
  • TH: Debuggability is now similar
  • TH, SB, RJ agree that both approaches (HMC7043 and custom) are currently roughly equal in complexity, risk. Testability with Sayma v1 is better for the HMC solution
  • TH Suggestion: SB tests for 2 more days, PK/GK reproduce sync and alignment and stability/determinism, then make call on clock distribution and sync
  • Consensus on that suggestion

4. Sayma 3.3V failures

  • https://github.com/sinara-hw/sinara/issues/567
  • TH: needs to be fixed
  • GK: is debugging the Exar, also present in AFCZ, failing one rail. If debugging fails potentially replace by linear/analog bricks. But suspects something stupid and not capacitors/compensation/etc.
  • GK considers removing some rail limits protecting the FPGA but destabilizing the Exar, one overvoltage issue exists and needs debugging
  • Consensus to urgently resolve and then decide on Exar vs AD/Linear alternative

5. Proposal to set a single day of the week and time for future meetings

  • PK suggestion
  • JB: after 13:30 UTC
  • SB: before 00:00 HKT
  • PK sets up doodle vote
  • no objections

6. Next meeting chair, rough date, minutes taker, feedback on meeting quality

  • TH chair
  • JB minutes
  • JB requests better user technology tests for hangouts
  • TH asks for resolutions on GH issues and only signoff on meeting
  • RJ, PK second that
  • Consensus: to be put to work in next meeting
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