Minor issue installing in VM on MacOS #62
Comments
|
Turns out my 'fix' here allows for installation, but fails whenever something is built. The This actually works: |
cr1901
added a commit
to cr1901/litex-buildenv
that referenced
this issue
Nov 8, 2018
* litedram changed from f36bcff to 69ea866
* 69ea866 - Merge pull request timvideos#62 from daveshah1/AS4C32M16 <enjoy-digital>
|\
| * 3a5d45b - modules: Add AS4C32M16 32Mx16 SDRAM <David Shah>
* | b41fe61 - phy/kusddrphy/ddr4: multiplexed address bits are always the same (14, 15, 16) and fix ba/bg ordering <Florent Kermarrec>
* | 2e19787 - phy/kusddrphy: add dfi mux on address/control signals <Florent Kermarrec>
* | a8c3d39 - sdram_init: fix compilation <Florent Kermarrec>
* | af34489 - common: add DDR4 burst_length <Florent Kermarrec>
* | 2a9fb11 - phy/kusddrphy: more genericity, initial DDR4 support <Florent Kermarrec>
* | ae5dc9f - sdram_init: add initial DDR4 initialization <Florent Kermarrec>
* | 8181fea - modules: add EDY4016A DDR4 <Florent Kermarrec>
* | 346e64c - frontend/ecc: fix typo <Florent Kermarrec>
|/
* 82c08c7 - phy/gensdrphy: use tristate input <Florent Kermarrec>
* 9ce84d9 - modules: add MT48LC16M16 (ulx3s) <Florent Kermarrec>
* liteeth changed from 40b99ec to 52c2301
* 52c2301 - frontend/etherbone: reduce default buffer_depth to 4 <Florent Kermarrec>
* 602ddec - common: use reverse_bytes from litex.gen <Florent Kermarrec>
* litepcie changed from a8b8048 to 80f28b1
* 80f28b1 - common: use reverse_bits/reverse_bytes from litex.gen <Florent Kermarrec>
* litex changed from 98159209 to fc0d5c39
* fc0d5c39 - bios/sdram: iterate multiple time for write leveling and add vote to eliminate transcients <Florent Kermarrec>
* 09f962fd - target/kcu105: add reset button <Florent Kermarrec>
* 169f8d8c - boards/platforms/kcu105: fix sdram/dq pin swap <Florent Kermarrec>
* 2624ba48 - bios/sdram: replace DDR3_MR1 constant with DDRX_MR1 <Florent Kermarrec>
* 6be74aa1 - boards/targets: add kcu105 <Florent Kermarrec>
* 93c62325 - Merge pull request timvideos#122 from daveshah1/trellis_ulx3s <enjoy-digital>
|\
| * 0729b3a0 - ulx3s: Connect SDRAM clock <David Shah>
| * 84044349 - Fix Trellis build; ULX3S demo boots to BIOS <David Shah>
| * 0c1d8d59 - trellis: Switch to using LPF for constraints <David Shah>
* | 00ef8240 - Merge pull request timvideos#124 from jfng/master <enjoy-digital>
|\ \
| * | dcbe759b - build/sim/verilator: don't use --threads when $(THREADS) is unset <Jean-François Nguyen>
|/ /
* | 6f38213a - boards/platforms/kc705: add user_sma_mgt_refclk <Florent Kermarrec>
* | 4cdd6799 - Merge pull request timvideos#123 from cr1901/prv32-min <enjoy-digital>
|\ \
| * | e56f7182 - libbase/crt0-picorv32: Emulate support for a relocatable IRQ vector (hardcoded at synthesis time). <William D. Jones>
| * | f32121e0 - cpu/picorv32: IRQ vector needs to be moved to 16 bytes after the RESET vector. <William D. Jones>
| * | 77389d27 - libbase/crt0-picorv32: Ensure BSS is cleared on boot. <William D. Jones>
| * | f69bd877 - cpu/picorv32: Create minimal variant (disable mul/div insns, most speed optimizations). <William D. Jones>
| * | d05fe673 - cpu/picorv32: Extract picorv32 parameters from Instance constructor to facilitate creating variant CPUs. <William D. Jones>
* | | f7969b66 - cores/clock: add with_reset parameter (default to True) <Florent Kermarrec>
| |/
|/|
* | 445c4940 - boards/platforms/kcu105: add sfp_tx/rx definition <Florent Kermarrec>
|/
* e9d4c882 - build/lattice/prjtrellis: fix default toolchain_path <Florent Kermarrec>
* 468780c0 - soc/cores/spi_flash: add endianness parameter <Florent Kermarrec>
* 6f3131e2 - soc/interconnect/stream_packet: use reverse_bytes from litex.gen <Florent Kermarrec>
* b7968538 - gen: add common with reverse_bits/reverse_bytes functions <Florent Kermarrec>
* 71fc34d7 - boards/targets/ulx3s: reduce l2_size <Florent Kermarrec>
* 75d073f3 - build/lattice/prjtrellis: fix typo <Florent Kermarrec>
* 6048a529 - build/lattice/prjtrellis: modify generated verilog instead of creating a wrapper, handle inouts. <Florent Kermarrec>
* 2243f628 - build/lattice/common: fix LatticeECPXPrjTrellisTristateImpl <Florent Kermarrec>
* 3a8bb94a - Merge pull request timvideos#121 from cr1901/patch-3 <Tim Ansell>
|\
| * f3111e11 - Update vivado.py <William D. Jones>
|/
* 98fa8996 - boards/targets: add ulx3s <Florent Kermarrec>
* 7d779473 - boards/platforms: add ulx3s <Florent Kermarrec>
* d9dcad33 - build/lattice/prjtrellis: add inout support <Florent Kermarrec>
* 091ad799 - build/lattice/common: add tristate support <Florent Kermarrec>
* 23acefb1 - boards/targets/versaecp55g_prjtrellis: simple.py example working, specific target no longer needed <Florent Kermarrec>
* 1097f822 - build/lattice/prjtrellis: set default toolchain_path to "/opt/prjtrellis" <Florent Kermarrec>
* 52917a71 - boards/targets/simple: add gateware-toolchain parameter <Florent Kermarrec>
* d84083f6 - boards/platforms/versaecp55g: use ftdi serial pins <Florent Kermarrec>
* c05b9ef2 - build/lattice/prjtrellis: test and fix iowrapper multi-bit signals support <Florent Kermarrec>
* a8f819fe - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
* 4eb314a2 - boards/targets/versaecp55g: use new iowrapper support, basic led blink and ios working :) <Florent Kermarrec>
* 27ec2a59 - build/lattice/prjtrellis: generate iowrapper to set constraints and TRELLIS_IO <Florent Kermarrec>
* c506c975 - gen/fhdl/verilog: set direction to io signals <Florent Kermarrec>
* migen changed from 0.6.dev-179-g657c0c7 to 0.6.dev-187-gc79d988
* c79d988 - build/platforms/versaecp55g: add X3 external connector. <whitequark>
* d60cea0 - build/platforms/versaecp55g: add external clock input. <whitequark>
* c51a064 - build/platforms/versaecp55g: allow programming without ispCLOCK in chain. <whitequark>
* 34eeb3b - build/platforms/versaecp55g: import from litex. <whitequark>
* 7bdc4ed - build/lattice/diamond: add Linux support. <whitequark>
* 3a84a8b - build/lattice/diamond: only run Jedecgen for MachXO. <whitequark>
* 966781b - class Tristate: add support for target parameter with oe, o and i subsignals. (timvideos#148) <Staf Verhaegen>
* 907afd5 - platforms/icebreaker: Rename I/O w/ @esden's feedback. <William D. Jones>
Full submodule status
--
5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD)
a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD)
69ea8668d06f3973e2342a1f8bc3ace2ca37f808 litedram (remotes/origin/HEAD)
52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
80f28b1dd4d67c37a3829fbeef725a3ca8efad79 litepcie (remotes/origin/HEAD)
b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD)
1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD)
0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD)
13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD)
fc0d5c3963146f67ad03ba0c6bdf06a6b4a0cde6 litex (heads/master)
c79d98882088ceb23b9095002d08ad93a81d0021 migen (0.6.dev-187-gc79d988)
mithro
added a commit
to mithro/litex-buildenv
that referenced
this issue
Nov 13, 2018
* litedram changed from f36bcff to 30d9a3e
* 30d9a3e - modules: add MT40A1G8 DDR4 <Florent Kermarrec>
* 4459bd2 - frontend/axi: same condition to connect connect wdata.we and wdata <Florent Kermarrec>
* d10e2e9 - core: make address_mapping a controller setting <Florent Kermarrec>
* 7973b7d - frontend/axi: emits the write command only if we have the write data <Florent Kermarrec>
* 6fa891d - frontend/axi: fix write response for bursts <Florent Kermarrec>
* 93e8510 - test/test_axi: add bursts to axi2native <Florent Kermarrec>
* e27fbc2 - test/test_axi: move definitions to top and make Access herit from Burst <Florent Kermarrec>
* 4470f32 - test/test_axi: change order of the tests <Florent Kermarrec>
* 070cc26 - test/test_axi: use separate generator for writes cmd/data <Florent Kermarrec>
* 127e928 - frontend/wishbone: simplify LiteDRAMWishbone2Native code (resource usage almost the same) <Florent Kermarrec>
* ca82ac1 - frontend/wishbone: add LiteDRAMWishbone2AXI <Florent Kermarrec>
* 3586e15 - frontend/axi: improve len/size comment (-1), set default id_width to 1 <Florent Kermarrec>
* 71be616 - frontend/axi: be sure wdata is available before sending the command to the controller <Florent Kermarrec>
* 55b5f40 - modules: add AS4C256M16D3A <Florent Kermarrec>
* 69ea866 - Merge pull request timvideos#62 from daveshah1/AS4C32M16 <enjoy-digital>
|\
| * 3a5d45b - modules: Add AS4C32M16 32Mx16 SDRAM <David Shah>
* | b41fe61 - phy/kusddrphy/ddr4: multiplexed address bits are always the same (14, 15, 16) and fix ba/bg ordering <Florent Kermarrec>
* | 2e19787 - phy/kusddrphy: add dfi mux on address/control signals <Florent Kermarrec>
* | a8c3d39 - sdram_init: fix compilation <Florent Kermarrec>
* | af34489 - common: add DDR4 burst_length <Florent Kermarrec>
* | 2a9fb11 - phy/kusddrphy: more genericity, initial DDR4 support <Florent Kermarrec>
* | ae5dc9f - sdram_init: add initial DDR4 initialization <Florent Kermarrec>
* | 8181fea - modules: add EDY4016A DDR4 <Florent Kermarrec>
* | 346e64c - frontend/ecc: fix typo <Florent Kermarrec>
|/
* 82c08c7 - phy/gensdrphy: use tristate input <Florent Kermarrec>
* 9ce84d9 - modules: add MT48LC16M16 (ulx3s) <Florent Kermarrec>
* liteeth changed from 40b99ec to 52c2301
* 52c2301 - frontend/etherbone: reduce default buffer_depth to 4 <Florent Kermarrec>
* 602ddec - common: use reverse_bytes from litex.gen <Florent Kermarrec>
* litepcie changed from a8b8048 to 48f662e
* 48f662e - phy/s7pciephy: force user to use register_pll1 if pll1 is needed <Florent Kermarrec>
* 33f4601 - phy/s7pciephy: add register_pll1 method <Florent Kermarrec>
* 80f28b1 - common: use reverse_bits/reverse_bytes from litex.gen <Florent Kermarrec>
* litex changed from v0.1-532-g98159209 to v0.1-600-gaf25bf2b
* af25bf2b - soc_core: check for cpu before checking interrupt <Florent Kermarrec>
* b4bdf2a0 - cores/clock/S7: just reset the generated clock, not the PLL/MMCM <Florent Kermarrec>
* 86fd945b - bios/main: fix typo on mor1kx <Florent Kermarrec>
* af950285 - cpu/mor1kx: use clang only for linux variant <Florent Kermarrec>
* 04523bc2 - xilinx/vivado: fix migen merge <Florent Kermarrec>
* f3343c46 - platforms: remove versaecp55g_sdram <Florent Kermarrec>
* 58414b18 - build/xilinx/vivado: merge migen change <Florent Kermarrec>
* a7f17f99 - build: use default toolchain_path on all backend when passed value is None <Florent Kermarrec>
* eed1d5cb - generic_platform: use set for sources <Florent Kermarrec>
* 665fff83 - build: merge more migen changes <Florent Kermarrec>
* 70f48775 - platforms/versa_ecp5: import migen changes <Florent Kermarrec>
* 4ff241b9 - targets/ulx3s,versa_ecp5: prjtrellis toolchain renamed to trellis <Florent Kermarrec>
* cb86728a - build/lattice: import changes from migen <Florent Kermarrec>
* 8574c62f - targets/versa_ecp5: increase sys_clk_freq to 50MHz <Florent Kermarrec>
* a752dafb - targets: add versa_ecp5 with sdram (ecp5 soc hat) at 25MHz/no pll <Florent Kermarrec>
* 87c7d23d - targets/ulx3s: for now revert to 25MHz clock/no pll <Florent Kermarrec>
* d1baae36 - platforms/versa_ecp5: add ecp5 soc hat ios <Florent Kermarrec>
* b3bf1c95 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
|\
| * 1be6762d - Merge pull request timvideos#125 from daveshah1/trellis_sdram <enjoy-digital>
| |\
| | * f08f80be - working on Versa-5G dram <David Shah>
| | * d78d5d3e - Debugging ULX3S SDRAM <David Shah>
* | | 425ad755 - plarforms: rename versa/versaecp55g to versa_ecp3/versa_ecp5 <Florent Kermarrec>
|/ /
* | c57aa545 - targets/ulx3s: get memtest working by disabling sdram refresh <Florent Kermarrec>
* | 9a644717 - soc/integration/soc_sdram: allow using axi interface with litedram <Florent Kermarrec>
* | 416bdb64 - boards/platforms: add avalanche polarfire board ios definition <Florent Kermarrec>
* | fc0d5c39 - bios/sdram: iterate multiple time for write leveling and add vote to eliminate transcients <Florent Kermarrec>
* | 09f962fd - target/kcu105: add reset button <Florent Kermarrec>
* | 169f8d8c - boards/platforms/kcu105: fix sdram/dq pin swap <Florent Kermarrec>
* | 2624ba48 - bios/sdram: replace DDR3_MR1 constant with DDRX_MR1 <Florent Kermarrec>
* | 6be74aa1 - boards/targets: add kcu105 <Florent Kermarrec>
* | 93c62325 - Merge pull request timvideos#122 from daveshah1/trellis_ulx3s <enjoy-digital>
|\ \
| |/
| * 0729b3a0 - ulx3s: Connect SDRAM clock <David Shah>
| * 84044349 - Fix Trellis build; ULX3S demo boots to BIOS <David Shah>
| * 0c1d8d59 - trellis: Switch to using LPF for constraints <David Shah>
* | 00ef8240 - Merge pull request timvideos#124 from jfng/master <enjoy-digital>
|\ \
| * | dcbe759b - build/sim/verilator: don't use --threads when $(THREADS) is unset <Jean-François Nguyen>
|/ /
* | 6f38213a - boards/platforms/kc705: add user_sma_mgt_refclk <Florent Kermarrec>
* | 4cdd6799 - Merge pull request timvideos#123 from cr1901/prv32-min <enjoy-digital>
|\ \
| * | e56f7182 - libbase/crt0-picorv32: Emulate support for a relocatable IRQ vector (hardcoded at synthesis time). <William D. Jones>
| * | f32121e0 - cpu/picorv32: IRQ vector needs to be moved to 16 bytes after the RESET vector. <William D. Jones>
| * | 77389d27 - libbase/crt0-picorv32: Ensure BSS is cleared on boot. <William D. Jones>
| * | f69bd877 - cpu/picorv32: Create minimal variant (disable mul/div insns, most speed optimizations). <William D. Jones>
| * | d05fe673 - cpu/picorv32: Extract picorv32 parameters from Instance constructor to facilitate creating variant CPUs. <William D. Jones>
* | | f7969b66 - cores/clock: add with_reset parameter (default to True) <Florent Kermarrec>
| |/
|/|
* | 445c4940 - boards/platforms/kcu105: add sfp_tx/rx definition <Florent Kermarrec>
|/
* e9d4c882 - build/lattice/prjtrellis: fix default toolchain_path <Florent Kermarrec>
* 468780c0 - soc/cores/spi_flash: add endianness parameter <Florent Kermarrec>
* 6f3131e2 - soc/interconnect/stream_packet: use reverse_bytes from litex.gen <Florent Kermarrec>
* b7968538 - gen: add common with reverse_bits/reverse_bytes functions <Florent Kermarrec>
* 71fc34d7 - boards/targets/ulx3s: reduce l2_size <Florent Kermarrec>
* 75d073f3 - build/lattice/prjtrellis: fix typo <Florent Kermarrec>
* 6048a529 - build/lattice/prjtrellis: modify generated verilog instead of creating a wrapper, handle inouts. <Florent Kermarrec>
* 2243f628 - build/lattice/common: fix LatticeECPXPrjTrellisTristateImpl <Florent Kermarrec>
* 3a8bb94a - Merge pull request timvideos#121 from cr1901/patch-3 <Tim Ansell>
|\
| * f3111e11 - Update vivado.py <William D. Jones>
|/
* 98fa8996 - boards/targets: add ulx3s <Florent Kermarrec>
* 7d779473 - boards/platforms: add ulx3s <Florent Kermarrec>
* d9dcad33 - build/lattice/prjtrellis: add inout support <Florent Kermarrec>
* 091ad799 - build/lattice/common: add tristate support <Florent Kermarrec>
* 23acefb1 - boards/targets/versaecp55g_prjtrellis: simple.py example working, specific target no longer needed <Florent Kermarrec>
* 1097f822 - build/lattice/prjtrellis: set default toolchain_path to "/opt/prjtrellis" <Florent Kermarrec>
* 52917a71 - boards/targets/simple: add gateware-toolchain parameter <Florent Kermarrec>
* d84083f6 - boards/platforms/versaecp55g: use ftdi serial pins <Florent Kermarrec>
* c05b9ef2 - build/lattice/prjtrellis: test and fix iowrapper multi-bit signals support <Florent Kermarrec>
* a8f819fe - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
* 4eb314a2 - boards/targets/versaecp55g: use new iowrapper support, basic led blink and ios working :) <Florent Kermarrec>
* 27ec2a59 - build/lattice/prjtrellis: generate iowrapper to set constraints and TRELLIS_IO <Florent Kermarrec>
* c506c975 - gen/fhdl/verilog: set direction to io signals <Florent Kermarrec>
* migen changed from 0.6.dev-179-g657c0c7 to 0.6.dev-209-gc285c12
* c285c12 - genlib/fsm: allow subclassing FSM and overriding control functionality. <whitequark>
* dd78f38 - sim/core: fix typo breaking `yield x.part(...).eq(...)`. <whitequark>
* f8bea17 - test/test_fsm: fix typo. <whitequark>
* 319d3cd - build: use default toolchain_path on all backends when toolchain_path passed value is None <Florent Kermarrec>
* e7c9ab0 - xilinx/vivado: fix missing **kwargs <Florent Kermarrec>
* 8789575 - xilinx/vivado: fix edifs/ips import <Florent Kermarrec>
* 5851076 - build: make sure build_name/kwargs are passed to platform.get_verilog on all backends <Florent Kermarrec>
* ec40e98 - xilinx/vivado: enable xpm libraries <Florent Kermarrec>
* 21bb0f7 - xilinx/vivado: add support for importing edifs for ips <Florent Kermarrec>
* 263e729 - xilinx/programmer: add device parameter <Florent Kermarrec>
* f71b4a8 - xilinx/ise: set build_name as top name <Florent Kermarrec>
* 2dc085d - lattice/common: no need to differentiate nbits==1 and nbits > 1 <Florent Kermarrec>
* 48023fa - lattice: fix Misc constraints <Florent Kermarrec>
* 1fdf5db - lattice/diamond: use build_name as top name <Florent Kermarrec>
* 28a5f32 - genlib/fsm: add basic FSM tests. <whitequark>
* 9cd4e2c - remove asic_syntax and other cleanups <Sebastien Bourdeauducq>
* cf4c3ef - build/lattice/diamond: translate `keep` and `no_retiming` attributes. <whitequark>
* d5ac858 - build/lattice/diamond: save LDF project after creating it. <whitequark>
* 2025071 - build/lattice/diamond: shorten pointlessly long paths. <whitequark>
* 7303a8a - build/platforms/versaecp55g: add PCIe pins. <whitequark>
* 0c5d42c - Add Project Trellis Backend (timvideos#156) <William D. Jones>
* 37deff1 - build/platforms/versaecp55g: fix IOStandard for ext_clk. <whitequark>
* c79d988 - build/platforms/versaecp55g: add X3 external connector. <whitequark>
* d60cea0 - build/platforms/versaecp55g: add external clock input. <whitequark>
* c51a064 - build/platforms/versaecp55g: allow programming without ispCLOCK in chain. <whitequark>
* 34eeb3b - build/platforms/versaecp55g: import from litex. <whitequark>
* 7bdc4ed - build/lattice/diamond: add Linux support. <whitequark>
* 3a84a8b - build/lattice/diamond: only run Jedecgen for MachXO. <whitequark>
* 966781b - class Tristate: add support for target parameter with oe, o and i subsignals. (timvideos#148) <Staf Verhaegen>
* 907afd5 - platforms/icebreaker: Rename I/O w/ @esden's feedback. <William D. Jones>
Full submodule status
--
5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD)
a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD)
30d9a3e2c22459470605b8d46f27d339b47f7987 litedram (remotes/origin/HEAD)
52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
48f662e3928aa5af25aef932a8b1744d1f29c260 litepcie (remotes/origin/HEAD)
b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD)
1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD)
0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD)
13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD)
af25bf2bc01679f473bf563e6dc1a9f86ff2b43f litex (v0.1-600-gaf25bf2b)
c285c12905cca3d8db59ce9fba3bbcd7e781e3c3 migen (0.6.dev-209-gc285c12)
Merged
mithro
added a commit
to mithro/litex-buildenv
that referenced
this issue
Nov 14, 2018
* litedram changed from f36bcff to 30d9a3e
* 30d9a3e - modules: add MT40A1G8 DDR4 <Florent Kermarrec>
* 4459bd2 - frontend/axi: same condition to connect connect wdata.we and wdata <Florent Kermarrec>
* d10e2e9 - core: make address_mapping a controller setting <Florent Kermarrec>
* 7973b7d - frontend/axi: emits the write command only if we have the write data <Florent Kermarrec>
* 6fa891d - frontend/axi: fix write response for bursts <Florent Kermarrec>
* 93e8510 - test/test_axi: add bursts to axi2native <Florent Kermarrec>
* e27fbc2 - test/test_axi: move definitions to top and make Access herit from Burst <Florent Kermarrec>
* 4470f32 - test/test_axi: change order of the tests <Florent Kermarrec>
* 070cc26 - test/test_axi: use separate generator for writes cmd/data <Florent Kermarrec>
* 127e928 - frontend/wishbone: simplify LiteDRAMWishbone2Native code (resource usage almost the same) <Florent Kermarrec>
* ca82ac1 - frontend/wishbone: add LiteDRAMWishbone2AXI <Florent Kermarrec>
* 3586e15 - frontend/axi: improve len/size comment (-1), set default id_width to 1 <Florent Kermarrec>
* 71be616 - frontend/axi: be sure wdata is available before sending the command to the controller <Florent Kermarrec>
* 55b5f40 - modules: add AS4C256M16D3A <Florent Kermarrec>
* 69ea866 - Merge pull request timvideos#62 from daveshah1/AS4C32M16 <enjoy-digital>
|\
| * 3a5d45b - modules: Add AS4C32M16 32Mx16 SDRAM <David Shah>
* | b41fe61 - phy/kusddrphy/ddr4: multiplexed address bits are always the same (14, 15, 16) and fix ba/bg ordering <Florent Kermarrec>
* | 2e19787 - phy/kusddrphy: add dfi mux on address/control signals <Florent Kermarrec>
* | a8c3d39 - sdram_init: fix compilation <Florent Kermarrec>
* | af34489 - common: add DDR4 burst_length <Florent Kermarrec>
* | 2a9fb11 - phy/kusddrphy: more genericity, initial DDR4 support <Florent Kermarrec>
* | ae5dc9f - sdram_init: add initial DDR4 initialization <Florent Kermarrec>
* | 8181fea - modules: add EDY4016A DDR4 <Florent Kermarrec>
* | 346e64c - frontend/ecc: fix typo <Florent Kermarrec>
|/
* 82c08c7 - phy/gensdrphy: use tristate input <Florent Kermarrec>
* 9ce84d9 - modules: add MT48LC16M16 (ulx3s) <Florent Kermarrec>
* liteeth changed from 40b99ec to 52c2301
* 52c2301 - frontend/etherbone: reduce default buffer_depth to 4 <Florent Kermarrec>
* 602ddec - common: use reverse_bytes from litex.gen <Florent Kermarrec>
* litepcie changed from a8b8048 to 48f662e
* 48f662e - phy/s7pciephy: force user to use register_pll1 if pll1 is needed <Florent Kermarrec>
* 33f4601 - phy/s7pciephy: add register_pll1 method <Florent Kermarrec>
* 80f28b1 - common: use reverse_bits/reverse_bytes from litex.gen <Florent Kermarrec>
* litex changed from v0.1-532-g98159209 to v0.1-602-gbc173380
* bc173380 - Merge pull request timvideos#126 from mithro/toolchain-fix <Tim Ansell>
|\
| * b1425ba8 - lattice/icestorm: Add toolchain_path so it doesn't end up kwargs. <Tim 'mithro' Ansell>
|/
* af25bf2b - soc_core: check for cpu before checking interrupt <Florent Kermarrec>
* b4bdf2a0 - cores/clock/S7: just reset the generated clock, not the PLL/MMCM <Florent Kermarrec>
* 86fd945b - bios/main: fix typo on mor1kx <Florent Kermarrec>
* af950285 - cpu/mor1kx: use clang only for linux variant <Florent Kermarrec>
* 04523bc2 - xilinx/vivado: fix migen merge <Florent Kermarrec>
* f3343c46 - platforms: remove versaecp55g_sdram <Florent Kermarrec>
* 58414b18 - build/xilinx/vivado: merge migen change <Florent Kermarrec>
* a7f17f99 - build: use default toolchain_path on all backend when passed value is None <Florent Kermarrec>
* eed1d5cb - generic_platform: use set for sources <Florent Kermarrec>
* 665fff83 - build: merge more migen changes <Florent Kermarrec>
* 70f48775 - platforms/versa_ecp5: import migen changes <Florent Kermarrec>
* 4ff241b9 - targets/ulx3s,versa_ecp5: prjtrellis toolchain renamed to trellis <Florent Kermarrec>
* cb86728a - build/lattice: import changes from migen <Florent Kermarrec>
* 8574c62f - targets/versa_ecp5: increase sys_clk_freq to 50MHz <Florent Kermarrec>
* a752dafb - targets: add versa_ecp5 with sdram (ecp5 soc hat) at 25MHz/no pll <Florent Kermarrec>
* 87c7d23d - targets/ulx3s: for now revert to 25MHz clock/no pll <Florent Kermarrec>
* d1baae36 - platforms/versa_ecp5: add ecp5 soc hat ios <Florent Kermarrec>
* b3bf1c95 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
|\
| * 1be6762d - Merge pull request timvideos#125 from daveshah1/trellis_sdram <enjoy-digital>
| |\
| | * f08f80be - working on Versa-5G dram <David Shah>
| | * d78d5d3e - Debugging ULX3S SDRAM <David Shah>
* | | 425ad755 - plarforms: rename versa/versaecp55g to versa_ecp3/versa_ecp5 <Florent Kermarrec>
|/ /
* | c57aa545 - targets/ulx3s: get memtest working by disabling sdram refresh <Florent Kermarrec>
* | 9a644717 - soc/integration/soc_sdram: allow using axi interface with litedram <Florent Kermarrec>
* | 416bdb64 - boards/platforms: add avalanche polarfire board ios definition <Florent Kermarrec>
* | fc0d5c39 - bios/sdram: iterate multiple time for write leveling and add vote to eliminate transcients <Florent Kermarrec>
* | 09f962fd - target/kcu105: add reset button <Florent Kermarrec>
* | 169f8d8c - boards/platforms/kcu105: fix sdram/dq pin swap <Florent Kermarrec>
* | 2624ba48 - bios/sdram: replace DDR3_MR1 constant with DDRX_MR1 <Florent Kermarrec>
* | 6be74aa1 - boards/targets: add kcu105 <Florent Kermarrec>
* | 93c62325 - Merge pull request timvideos#122 from daveshah1/trellis_ulx3s <enjoy-digital>
|\ \
| |/
| * 0729b3a0 - ulx3s: Connect SDRAM clock <David Shah>
| * 84044349 - Fix Trellis build; ULX3S demo boots to BIOS <David Shah>
| * 0c1d8d59 - trellis: Switch to using LPF for constraints <David Shah>
* | 00ef8240 - Merge pull request timvideos#124 from jfng/master <enjoy-digital>
|\ \
| * | dcbe759b - build/sim/verilator: don't use --threads when $(THREADS) is unset <Jean-François Nguyen>
|/ /
* | 6f38213a - boards/platforms/kc705: add user_sma_mgt_refclk <Florent Kermarrec>
* | 4cdd6799 - Merge pull request timvideos#123 from cr1901/prv32-min <enjoy-digital>
|\ \
| * | e56f7182 - libbase/crt0-picorv32: Emulate support for a relocatable IRQ vector (hardcoded at synthesis time). <William D. Jones>
| * | f32121e0 - cpu/picorv32: IRQ vector needs to be moved to 16 bytes after the RESET vector. <William D. Jones>
| * | 77389d27 - libbase/crt0-picorv32: Ensure BSS is cleared on boot. <William D. Jones>
| * | f69bd877 - cpu/picorv32: Create minimal variant (disable mul/div insns, most speed optimizations). <William D. Jones>
| * | d05fe673 - cpu/picorv32: Extract picorv32 parameters from Instance constructor to facilitate creating variant CPUs. <William D. Jones>
* | | f7969b66 - cores/clock: add with_reset parameter (default to True) <Florent Kermarrec>
| |/
|/|
* | 445c4940 - boards/platforms/kcu105: add sfp_tx/rx definition <Florent Kermarrec>
|/
* e9d4c882 - build/lattice/prjtrellis: fix default toolchain_path <Florent Kermarrec>
* 468780c0 - soc/cores/spi_flash: add endianness parameter <Florent Kermarrec>
* 6f3131e2 - soc/interconnect/stream_packet: use reverse_bytes from litex.gen <Florent Kermarrec>
* b7968538 - gen: add common with reverse_bits/reverse_bytes functions <Florent Kermarrec>
* 71fc34d7 - boards/targets/ulx3s: reduce l2_size <Florent Kermarrec>
* 75d073f3 - build/lattice/prjtrellis: fix typo <Florent Kermarrec>
* 6048a529 - build/lattice/prjtrellis: modify generated verilog instead of creating a wrapper, handle inouts. <Florent Kermarrec>
* 2243f628 - build/lattice/common: fix LatticeECPXPrjTrellisTristateImpl <Florent Kermarrec>
* 3a8bb94a - Merge pull request timvideos#121 from cr1901/patch-3 <Tim Ansell>
|\
| * f3111e11 - Update vivado.py <William D. Jones>
|/
* 98fa8996 - boards/targets: add ulx3s <Florent Kermarrec>
* 7d779473 - boards/platforms: add ulx3s <Florent Kermarrec>
* d9dcad33 - build/lattice/prjtrellis: add inout support <Florent Kermarrec>
* 091ad799 - build/lattice/common: add tristate support <Florent Kermarrec>
* 23acefb1 - boards/targets/versaecp55g_prjtrellis: simple.py example working, specific target no longer needed <Florent Kermarrec>
* 1097f822 - build/lattice/prjtrellis: set default toolchain_path to "/opt/prjtrellis" <Florent Kermarrec>
* 52917a71 - boards/targets/simple: add gateware-toolchain parameter <Florent Kermarrec>
* d84083f6 - boards/platforms/versaecp55g: use ftdi serial pins <Florent Kermarrec>
* c05b9ef2 - build/lattice/prjtrellis: test and fix iowrapper multi-bit signals support <Florent Kermarrec>
* a8f819fe - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
* 4eb314a2 - boards/targets/versaecp55g: use new iowrapper support, basic led blink and ios working :) <Florent Kermarrec>
* 27ec2a59 - build/lattice/prjtrellis: generate iowrapper to set constraints and TRELLIS_IO <Florent Kermarrec>
* c506c975 - gen/fhdl/verilog: set direction to io signals <Florent Kermarrec>
* migen changed from 0.6.dev-179-g657c0c7 to 0.6.dev-209-gc285c12
* c285c12 - genlib/fsm: allow subclassing FSM and overriding control functionality. <whitequark>
* dd78f38 - sim/core: fix typo breaking `yield x.part(...).eq(...)`. <whitequark>
* f8bea17 - test/test_fsm: fix typo. <whitequark>
* 319d3cd - build: use default toolchain_path on all backends when toolchain_path passed value is None <Florent Kermarrec>
* e7c9ab0 - xilinx/vivado: fix missing **kwargs <Florent Kermarrec>
* 8789575 - xilinx/vivado: fix edifs/ips import <Florent Kermarrec>
* 5851076 - build: make sure build_name/kwargs are passed to platform.get_verilog on all backends <Florent Kermarrec>
* ec40e98 - xilinx/vivado: enable xpm libraries <Florent Kermarrec>
* 21bb0f7 - xilinx/vivado: add support for importing edifs for ips <Florent Kermarrec>
* 263e729 - xilinx/programmer: add device parameter <Florent Kermarrec>
* f71b4a8 - xilinx/ise: set build_name as top name <Florent Kermarrec>
* 2dc085d - lattice/common: no need to differentiate nbits==1 and nbits > 1 <Florent Kermarrec>
* 48023fa - lattice: fix Misc constraints <Florent Kermarrec>
* 1fdf5db - lattice/diamond: use build_name as top name <Florent Kermarrec>
* 28a5f32 - genlib/fsm: add basic FSM tests. <whitequark>
* 9cd4e2c - remove asic_syntax and other cleanups <Sebastien Bourdeauducq>
* cf4c3ef - build/lattice/diamond: translate `keep` and `no_retiming` attributes. <whitequark>
* d5ac858 - build/lattice/diamond: save LDF project after creating it. <whitequark>
* 2025071 - build/lattice/diamond: shorten pointlessly long paths. <whitequark>
* 7303a8a - build/platforms/versaecp55g: add PCIe pins. <whitequark>
* 0c5d42c - Add Project Trellis Backend (timvideos#156) <William D. Jones>
* 37deff1 - build/platforms/versaecp55g: fix IOStandard for ext_clk. <whitequark>
* c79d988 - build/platforms/versaecp55g: add X3 external connector. <whitequark>
* d60cea0 - build/platforms/versaecp55g: add external clock input. <whitequark>
* c51a064 - build/platforms/versaecp55g: allow programming without ispCLOCK in chain. <whitequark>
* 34eeb3b - build/platforms/versaecp55g: import from litex. <whitequark>
* 7bdc4ed - build/lattice/diamond: add Linux support. <whitequark>
* 3a84a8b - build/lattice/diamond: only run Jedecgen for MachXO. <whitequark>
* 966781b - class Tristate: add support for target parameter with oe, o and i subsignals. (timvideos#148) <Staf Verhaegen>
* 907afd5 - platforms/icebreaker: Rename I/O w/ @esden's feedback. <William D. Jones>
Full submodule status
--
5eeb151a748788666534d6ea3da07f90400d24c2 edid-decode (remotes/origin/HEAD)
a628956da7dc794e6e3c95b31ff9ce3af58bc763 flash_proxies (remotes/origin/HEAD)
30d9a3e2c22459470605b8d46f27d339b47f7987 litedram (remotes/origin/HEAD)
52c23015b052e40600a84ac73227fb5a0f0ce862 liteeth (remotes/origin/HEAD)
48f662e3928aa5af25aef932a8b1744d1f29c260 litepcie (remotes/origin/HEAD)
b78a73110c0c26cf21bf1410329bf1e78286e929 litesata (remotes/origin/HEAD)
1634fa35bb9f2717ab355ca2e494e1d02fd489ec litescope (remotes/origin/HEAD)
0a9110f901182a1233cc4e64b6e39175f6784621 liteusb (remotes/origin/HEAD)
13d85a1fe360678bebd57c55f1b35988c655ae95 litevideo (remotes/origin/HEAD)
bc173380f21f82a82fc41e9face61b0c33e7f8e4 litex (v0.1-602-gbc173380)
c285c12905cca3d8db59ce9fba3bbcd7e781e3c3 migen (0.6.dev-209-gc285c12)
mateusz-holenko
added a commit
to antmicro/litex-buildenv
that referenced
this issue
Apr 15, 2020
* litedram changed from b06e946 to de55a8e
* de55a8e - test/test_bandwidth: review, cleanup, fix typo. <Florent Kermarrec>
* 907ef73 - test/test_wishbone: add comments/cleanup. <Florent Kermarrec>
* 02fd39c - test/test_fifo: add comments. <Florent Kermarrec>
* 14edb5b - test/test_dma: add comments. <Florent Kermarrec>
* 97e214b - test/test_bist: add comments, fix a typo. <Florent Kermarrec>
* c55136c - test/test_bist: enable test_bist_csr_cdc (now passing with refactored CDC). <Florent Kermarrec>
* 92e34d4 - frontend/bist: simplify and fix CDC using AsyncFIFO. <Florent Kermarrec>
* 378c441 - frontend/bist: rename run/ready to run_cascade_in/run_cascade_out. <Florent Kermarrec>
* 829dee6 - frontend/bist: remove run/ready CSR. <Florent Kermarrec>
* b399ae2 - test/benchmark: default value of run is 1, no need to drive it. <Florent Kermarrec>
* 7c5e1e7 - frontend/bist: remove wrong comment and don't increment ticks when waiting. <Florent Kermarrec>
* 4dbb5b1 - test/run_benchmarks: fix syntax. <Florent Kermarrec>
* 966ebcb - test: cleanup/uniformize things between tests. <Florent Kermarrec>
* 0efd619 - test/test_adaption: review, add some comments. <Florent Kermarrec>
* 38b78fc - test/run_benchmarks: review, minor styles changes. <Florent Kermarrec>
* 962dcd7 - phy/model: review/cleanup DFITimingsChecker. <Florent Kermarrec>
* 64c2be5 - README: switch to markdown. <Florent Kermarrec>
* 835825b - Merge pull request timvideos#179 from antmicro/jboc/docs <enjoy-digital>
|\
| * dbac83f - core: add missing docstrings <Jędrzej Boczar>
| * 1f246cb - core/crossbar: remove dead code <Jędrzej Boczar>
* | 969943e - Merge pull request timvideos#178 from antmicro/jboc/unit-tests-crossbar <enjoy-digital>
|\ \
| * | 8a0bcb3 - test: add core.crossbar tests <Jędrzej Boczar>
| * | e74a2e6 - test: fix missing cases in bankmachine test <Jędrzej Boczar>
* | | 06965b7 - phy/gensdrphy: simplify using SDRTristate, change SDROutput/SDRInput to single-bit. <Florent Kermarrec>
* | | 9d20642 - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* | | b9f4d99 - phy/gensdrphy: use SDRInput, SDROutput to allow infered or instantiated IO regs. <Florent Kermarrec>
|/ /
* | 36d62d5 - Merge pull request timvideos#177 from antmicro/jboc/unit-tests-bankmachine <enjoy-digital>
|\ \
| * | 7b8b68a - test: add core.bankmachine tests <Jędrzej Boczar>
| |/
* | 492b9fa - Merge pull request timvideos#175 from antmicro/jboc/unit-tests-bandwidth <enjoy-digital>
|\ \
| * | f0496b2 - core/bandwidth: avoid missing a command <Jędrzej Boczar>
| * | c03bed8 - test: add core.bandwidth.Bandwidth tests <Jędrzej Boczar>
* | | cc7621d - Merge pull request timvideos#173 from antmicro/jboc/unit-tests <enjoy-digital>
|\| |
| * | a62e59b - test: skip _CommandChooser tests from Issue timvideos#174 <Jędrzej Boczar>
| * | 00fcdf6 - test: split core.multiplexer tests into separate files <Jędrzej Boczar>
| * | f619bed - test: clean up the code of core.multiplexer <Jędrzej Boczar>
| * | 1dd4227 - test: add core.multiplexer.Multiplexer tests <Jędrzej Boczar>
| * | ea93246 - test: add comments to core.multiplexer._Steerer tests <Jędrzej Boczar>
| * | 26ce993 - test: add core.multiplexer._Steerer tests <Jędrzej Boczar>
| * | f36b5a4 - test: add core.multiplexer._CommandChooser tests <Jędrzej Boczar>
| * | a1b1abe - test: use TestCase.subTest for more verbose error messages <Jędrzej Boczar>
| /
* / e7cd6a7 - .travis.yml: udpate to keep it similar with others .travis.yml files. <Florent Kermarrec>
|/
* 0c3a610 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* a98f51e - dfii: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* 96b273c - common/BitSlip: use reset_less on intermediate signal. <Florent Kermarrec>
* liteeth changed from fb47853 to 705003e
* 705003e - README: switch to markdown. <Florent Kermarrec>
* 92c3048 - examples: use CRG from litex.build. <Florent Kermarrec>
* 3bd807c - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 6ec7038 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 47a2e5b - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* ab55304 - mac/sram: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* liteiclink changed from 370855d to 6fdd020
* 6fdd020 - README: switch to markdown. <Florent Kermarrec>
* c4edb7e - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 1dcea14 - .travis.yml: fix git clone error. <Florent Kermarrec>
* e6ab98a - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litepcie changed from 5b7e7cd to 586ef78
* 586ef78 - README: switch to markdown. <Florent Kermarrec>
* 3e24df2 - README: add Xilinx Ultrascale support. <Florent Kermarrec>
* 81b3e13 - examples: add KCU105 example. (PCIe gen2 X4). <Florent Kermarrec>
* 32d64e4 - phy: add initial Ultrascale PHY (gen2 X4). <Florent Kermarrec>
* bb7a1e0 - phy/xilinx_us_x4: adaptations on packets to expose/receive standardized TLPs. <Florent Kermarrec>
* 1f28c9f - phy: add xilinx_us_x4. <Florent Kermarrec>
* a65aab9 - examples/kc705: cleanup, enable bridge and generate csr.csv. <Florent Kermarrec>
* 0748af1 - litepcie/common: update import. <Florent Kermarrec>
* 6bcafc4 - .travis.yml: fix git clone error. <Florent Kermarrec>
* fde0c62 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* 3dd6185 - soc/cores: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* 2a1c2e7 - phy: use reset_less on id/max_request_size/max_payload_size. <Florent Kermarrec>
* litesata changed from 1e3573b to 2e5c5b1
* 2e5c5b1 - README: switch to markdown. <Florent Kermarrec>
* 71e0210 - .travis.yml: fix git clone error. <Florent Kermarrec>
* e3a980e - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litescope changed from b3d1e69 to 54488c0
* 54488c0 - README: switch to markdown. <Florent Kermarrec>
* 72277ff - examples: use CRG from litex.build. <Florent Kermarrec>
* a05312d - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 5701c52 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 47819e8 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litevideo changed from 49d8126 to 41f3014
* 41f3014 - README: switch to markdown. <Florent Kermarrec>
* 6958c21 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litex changed from 536ae0e6 to 2d018826
* 2d018826 - setup.py/install_requires: add requests. <Florent Kermarrec>
* 5e149ced - build/generic_programmer: add automatic search/download of flash_proxy in repositories if not available locally. <Florent Kermarrec>
* a298a9e5 - Merge pull request timvideos#467 from antmicro/region_type_fix <enjoy-digital>
|\
| * 77a05b78 - soc_core: Fix region type generation <Mateusz Holenko>
|/
* d44fe18b - stream/AsyncFIFO: add default depth (useful when used for CDC). <Florent Kermarrec>
* ded10c89 - build/sim/core/Makefile: add -p to mkdir modules. <Florent Kermarrec>
* c323e94c - Merge pull request timvideos#464 from mithro/litex-sim-fixes <enjoy-digital>
|\
| * 97d0c525 - Remove trailing whitespace. <Tim 'mithro' Ansell>
| * 5a0bb6ee - litex_sim: Rework Makefiles to put output files in gateware directory. <Tim 'mithro' Ansell>
| * a0658421 - litex_sim: Better error messages on failure to load module. <Tim 'mithro' Ansell>
* | a8bf0216 - litex_setup: raise exception on update if repository has been been initialized. <Florent Kermarrec>
* | 4fe31f07 - cores: add External Memory Interface (EMIF) Wishbone bridge. <Florent Kermarrec>
* | 44746870 - Merge pull request timvideos#462 from ironsteel/trellis-12k <enjoy-digital>
|\ \
| |/
|/|
| * c57e438d - boards/targets/ulx3s.py: Update --device option help message <Rangel Ivanov>
| * f4b345ec - build/lattice/trellis.py: Add 12k device <Rangel Ivanov>
|/
* d0d2f282 - README: LiteDRAM moved to travis-ci.com as others repositories. <Florent Kermarrec>
* b95e0a19 - altera/common: add DDROutput, DDRInput, SDROutput, SDRInput. <Florent Kermarrec>
* 40f43efc - targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. <Florent Kermarrec>
* 292d6b75 - build/xilinx/common: add Spartan6 specialized DDRInput, SDROutput, SDRInput and SDRTristate. <Florent Kermarrec>
* 88dc5158 - build/io: add SDR Tristate (with infered version) and remove multi-bits support on SDRIO. <Florent Kermarrec>
* fdadbd86 - build/lattice/common: remove multi-bits support on SDRInput/Output. <Florent Kermarrec>
* 8159b65b - litex/build/io: also import CRG (since using DifferentialInput). <Florent Kermarrec>
* 79913e86 - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 8e014f76 - litex/build: move io.py from litex/gen and re-import DifferentialInput/Output, DDRInput/Output contributed to Migen. <Florent Kermarrec>
* 2e270cf2 - platforms/versa_ecp5: remove Lattice Programmer (no longer used since we can now use OpenOCD). <Florent Kermarrec>
* deebc49a - boards/platforms: cosmetic cleanups. <Florent Kermarrec>
* 3c0ba8ae - boards/plarforms/ulx3s: cleanup, fix user_leds, add spisdcard, add PULLMODE/DRIVE on SDRAM pins. <Florent Kermarrec>
* 6c429c99 - build/lattice: add ECP5 implementation for SDRInput/SDROutput. <Florent Kermarrec>
* 72c8d590 - litex/gen: add io with SDRInput/SDROutput (if not overrided, register is supposed to be infered). <Florent Kermarrec>
* 8f57321f - tools/litex_sim: remove LiteSPI support for now since breaking Travis-CI of others sub-projects. <Florent Kermarrec>
* 9afd017a - tools/litex_term: increase workaround delay for usb_fifo. (validated on Minispartan6 and MimasA7). <Florent Kermarrec>
* fdfede22 - Merge pull request timvideos#459 from mithro/travis-fix <enjoy-digital>
|\
| * cb7e3099 - travis: Run Windows build but allow it to fail. <Tim 'mithro' Ansell>
| * 43242012 - travis: Use litex_setup.py from the checked out code. <Tim 'mithro' Ansell>
|/
* 30f5faf9 - Merge pull request timvideos#458 from david-sawatzke/add_triple <Tim Ansell>
|\
| * d69b4443 - Add riscv64-none-elf triple <David Sawatzke>
|/
* 14bf8b81 - soc/cores/clock: add Max10PLL. <Florent Kermarrec>
* 2470ef50 - soc/cores/clock: add Cyclone10LPPLL. <Florent Kermarrec>
* f8d6d0fd - soc/cores/clock/CycloneVPLL: fix typos. <Florent Kermarrec>
* 970c8de4 - soc/cores/clock: rename Altera to Intel. <Florent Kermarrec>
* 383fcd36 - soc/cores/clock: add CycloneVPLL. <Florent Kermarrec>
* ab4906ea - targets/de0nano: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 0f17547c - soc/cores/clock: add initial AlteraClocking/CycloneIV support. <Florent Kermarrec>
* 3575d03f - .travis.yml: disable windows test (failing for now). <Florent Kermarrec>
* 2ca853fd - README.md: update RISCV toolchain installation. <Florent Kermarrec>
* d770bfbf - .travis.yml: remove Python3.5 test. <Florent Kermarrec>
* bc26af0d - Merge pull request timvideos#451 from mithro/multi-os <enjoy-digital>
|\
| * 3305a65b - Enable testing on multiple Python versions. <Tim 'mithro' Ansell>
| * 6bd5eae4 - Enable CI for Windows and Mac. <Tim 'mithro' Ansell>
* | 30d25ffe - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* | 3f1159fa - litex_setup: reorganize a bit, add separators/comments. <Florent Kermarrec>
* | 926f961b - .travis.yml: revert full url for litex_setup.py. <Florent Kermarrec>
* | 447e8d94 - Merge pull request timvideos#452 from mithro/riscv-download <enjoy-digital>
|\|
| * 9e324d9e - Remove symlinking step. <Tim 'mithro' Ansell>
| * 7f0ecddf - Use shutil.unpack_archive. <Tim 'mithro' Ansell>
| * a1dd8fc8 - Ignore SSL errors on CI. <Tim 'mithro' Ansell>
| * 2b2aff12 - Improve the path messages a little. <Tim 'mithro' Ansell>
| * 141644d1 - Make travis use litex_setup.py for GCC download. <Tim 'mithro' Ansell>
| * 6adabae7 - Adding SiFive RISC-V toolchain downloading to litex_setup.py <Tim 'mithro' Ansell>
| * 59b7db63 - Fix alignments. <Tim 'mithro' Ansell>
|/
* e408fb8f - Merge pull request timvideos#450 from mithro/litex-setup-fix <enjoy-digital>
|\
| * d781bf20 - Run `litex_setup.py` outside the git clone directory. <Tim 'mithro' Ansell>
| * dd59dac5 - litex_setup: Use subprocess so failures are noticed. <Tim 'mithro' Ansell>
|/
* 0f352cd6 - soc/cores: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* a67ab418 - interconnect/csr: add reset_less parameter. <Florent Kermarrec>
* 05b1b778 - interconnect/csr, wishbone: use reset_less on datapath signals. <Florent Kermarrec>
* b95965de - cores/code_8b10b: set reset_less to True on datapath signals. <Florent Kermarrec>
* a35df4f7 - stream: set reset_less to True on datapath signals. <Florent Kermarrec>
* cf1c5d99 - Merge pull request timvideos#448 from kessam/patch-1 <enjoy-digital>
|\
| * fb532f5e - Fix timing constraints <kessam>
|/
* 60431083 - soc/cores/clock/ECP5PLL: add CLKI_DIV support. <Florent Kermarrec>
* 27f00851 - Merge pull request timvideos#447 from antmicro/spi-xip <enjoy-digital>
|\
| * 81be74a7 - targets: netv2: add LiteSPI <Piotr Binkowski>
| * 946cb164 - platform: netv2: update SPI flash pinout <Piotr Binkowski>
| * 31fceb0a - litex_sim: add LiteSPI <Piotr Binkowski>
| * ff04869c - litex_setup: add litespi core <Piotr Binkowski>
* | 91981b96 - soc/cores/uart: use reset_less on accumulator, reg, bitcount to reduce. <Florent Kermarrec>
* | 87160059 - soc/cores/spi_flash: add ECP5SPIFlash (non-memory-mapped). <Florent Kermarrec>
* | e3445f6c - Merge pull request timvideos#444 from ilya-epifanov/openocd-jtag-programmer <enjoy-digital>
|\ \
| * | 351551a0 - Added openocd jtagspi programmer, to be used with ECP5-EVN board <Ilya Epifanov>
* | | aeb9411a - Merge pull request timvideos#441 from gsomlo/gls-spisdcard-fixes <enjoy-digital>
|\ \ \
| * | | 8473ed56 - software/bios: add spisdcardboot() to boot_sequence() <Gabriel Somlo>
| * | | e9054ef6 - software/libbase/spisdcard: add delay to goidle loop <Gabriel Somlo>
| * | | c6b6dee2 - software/bios: factor out busy_wait() function <Gabriel Somlo>
| * | | 540218b2 - software/libbase/spisdcard: fix width of address parameter <Gabriel Somlo>
|/ / /
* | | 2e48ab56 - soc/cores/spi: make dynamic clk divider optional (can be enabled with add_clk_divider method) and only use it in add_spi_sdcard. <Florent Kermarrec>
* | | 86eec1a4 - Merge pull request timvideos#439 from antmicro/fix-compiler-rt <enjoy-digital>
|\ \ \
| |_|/
|/| |
| * | 5fa2cc66 - Update removed llvm compiler-rt repo <Kamil Rakoczy>
|/ /
* | 4abb3715 - targets/add_constant: avoid specifying value when value is None (=default). <Florent Kermarrec>
* | 73b43475 - software/libbase/spisdcard: add USE_SPISDCARD_RECLOCKING define to easily disable reclocking. <Florent Kermarrec>
* | b509df8b - integration/soc/add_uart: add USB CDC support (with ValentyUSB core). <Florent Kermarrec>
* | 76872a7a - tools/litex_sim: simplify using uart_name=sim. <Florent Kermarrec>
* | 09a3ce0e - integration/soc/add_uart: add Model/Sim. <Florent Kermarrec>
* | 3f43c6a2 - integration/soc/add_uart: cleanup. <Florent Kermarrec>
|/
* 5bcf730c - build/tools: add replace_in_file function. <Florent Kermarrec>
* ffe83ef0 - tools/litex_term: use 64 bytes as default payload_lengh (work for all confniguration) and add small delay between frames for FT245 FIFO. <Florent Kermarrec>
* 8f2e3692 - bios/boot: update comments. <Florent Kermarrec>
* 1746b57a - Merge pull request timvideos#437 from feliks-montez/bugfix/fix-serialboot-frames <enjoy-digital>
|\
| * ebdc38fc - flush rx buffer when bad crc and fix frame payload length <Feliks>
* | c154d8d2 - test/test_targets: remove versa_ecp3. <Florent Kermarrec>
* | 8d999081 - boards/targets: update SDRAM to use new GENSDRPHY and new ECP5PLL phase support. <Florent Kermarrec>
* | 3eb08c7d - boards/platforms: remove versa_ecp3 (ECP3 no longer supported). <Florent Kermarrec>
* | eb641695 - build/lattice/diamond: remove ECP3 support. (ECP3 is not used and no longer interesting now that ECP5 has an open-source toolchain). <Florent Kermarrec>
* | bba5f182 - cores/clock/ECP5PLL: add phase support. <Florent Kermarrec>
* | 0123ccc8 - build/lattice/common: change LatticeECPXDDROutputImpl from ECP3 to ECP5. <Florent Kermarrec>
* | 5a402264 - Fix off-by-one error on almost full condition for prefetch <bunnie>
|/
* d62ef38c - soc/doc/csr: allow CSRField.reset to be a Migen Constant. <Florent Kermarrec>
* 4adac90d - cpu/vexriscv/mem_map_linux: move main_ram to allow up to 1GB. <Florent Kermarrec>
* 63ab2ba4 - software/bios/boot/linux: move emulator.bin to main_ram and allow defining custom ram offsets. <Florent Kermarrec>
* d9984754 - targets: remove Etherbone imports. <Florent Kermarrec>
* 3b04efbc - targets: switch to add_etherbone method. <Florent Kermarrec>
* 5ad7a3b7 - integration/soc: add add_etherbone method. <Florent Kermarrec>
* d6b0819e - integration/soc/add_ethernet: add name parameter (defaults to ethmac). <Florent Kermarrec>
* 930679ef - targets: always use sys_clk_freq on SDRAM modules. <Florent Kermarrec>
* ae6ef923 - targets: fix typos in previous changes. <Florent Kermarrec>
* c547b2cc - Merge pull request timvideos#436 from rob-ng15/master <enjoy-digital>
|\
| * 2bf31a31 - Reclock spi sdcard access after initialisation <rob-ng15>
* | 011773af - Merge pull request timvideos#435 from enjoy-digital/spi_master_clk_divider <enjoy-digital>
|\ \
| |/
|/|
| * 61c9e54a - soc/core/spi: add Clk Divider CSR (defaults to sys_clk_freq/spi_clk_freq). <Florent Kermarrec>
* | f03d862c - targets: switch to add_ethernet method instead of EthernetSoC. <Florent Kermarrec>
* | 4e9a8ffe - targets: switch to SoCCore/add_sdram instead of SoCSDRAM. <Florent Kermarrec>
|/
* dd7718b4 - targets/arty: use new ISERDESE2 MEMORY mode. <Florent Kermarrec>
* fca52d11 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
|\
| * 0f356648 - Merge pull request timvideos#434 from rob-ng15/master <enjoy-digital>
| |\
| | * f3c23377 - Use <stdint.h> to provide structure sizes <rob-ng15>
| | * c2ebbcbf - Use <stdint.h> for structure sizes <rob-ng15>
| |/
* / ccf73639 - integration/soc: add add_spi_flash method to add SPI Flash support to the SoC. <Florent Kermarrec>
|/
* ec3e0686 - targets/nexys4ddr: use LiteXSoC's add_spi_sdcard method. <Florent Kermarrec>
* d276036f - integration/soc: add add_spi_sdcard method to add SPI mode SDCard support to the SoC. <Florent Kermarrec>
* 60445709 - Merge pull request timvideos#433 from gsomlo/gls-rocket-spisdcard <enjoy-digital>
|\
| * b960d7c5 - targets/nexys4ddr: add '--with-spi-sdcard' build option <Gabriel Somlo>
| * 7a7b8905 - platforms/nexys4ddr: add spisdcard pins. <Gabriel Somlo>
| * af4de03f - targets/nexys4ddr: make sdcard reset conditional <Gabriel Somlo>
| * a33916bc - software/libbase/spisdcard: fix 4-byte FAT fields on 64-bit CPUs <Gabriel Somlo>
| * 1f90abea - bios: make SPI SDCard boot configs other than linux-on-litex-vexriscv <Gabriel Somlo>
| * c2938dc9 - bios/boot.c: cosmetic: re-indent spisdcardboot() for consistency <Gabriel Somlo>
* | fbadfa17 - Merge pull request timvideos#432 from esden/csr-doc-fix-int <Sean Cross>
|\ \
| |/
|/|
| * 27988672 - Don't let python convert lane number to float. <Piotr Esden-Tempski>
|/
* dd07a0ad - Merge pull request timvideos#431 from antmicro/hybrid-mac <enjoy-digital>
|\
| * 96a265a4 - litex_sim: add support for hybrid mac <Piotr Binkowski>
* 37f25ed3 - software/libbase/bios: rename spi.c/h to spisdcard.h, also rename functions. <Florent Kermarrec>
* 93925634 - software/bios/main: revert USDDRPHY_DEBUG (merge issue with SPI SD CARD PR). <Florent Kermarrec>
* 8fe9e72f - Merge pull request timvideos#429 from rob-ng15/master <enjoy-digital>
|\
| * 27720409 - SPI hardware bitbanging from SD CARD <rob-ng15>
| * d45dda73 - SPI hardware bitbanging from SD CARD <rob-ng15>
| * 50b6db6a - SPI hardware bitbanging from SD CARD <rob-ng15>
* | 9e1cd842 - Merge pull request timvideos#430 from gsomlo/gls-sdclk-stub <enjoy-digital>
|\ \
| * | b2103f4a - bios/sdcard: provide sdclk_set_clk() stub for clocker-less targets <Gabriel Somlo>
|/ /
* / e8651629 - platforms/kcu105: fix pcie tx0 p/n swap. <Florent Kermarrec>
|/
* 2c4b8963 - soc/cores/clock: make sure specific clkoutn_divide_range is only used as a fallback solution. <Florent Kermarrec>
* litex-boards changed from a7fbe0a to cb95962
* cb95962 - targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes. <Florent Kermarrec>
* 4b4f2f9 - Merge pull request timvideos#67 from mubes/ecp5_usb <enjoy-digital>
|\
| * f79a010 - Addition of flash for colorlight board <Dave Marples>
| * 389e8aa - Addition of USB ACM for ECP5 <Dave Marples>
|/
* a12faae - targets/colorlight_5a_75b: increase sys_ps phase (fixes memtest). <Florent Kermarrec>
* 52c9648 - arty_s7: fix copyrights, rename to arty_s7, various minor changes to make it similar to others targets. <Florent Kermarrec>
* 0cee59c - Merge pull request timvideos#65 from Fatsie/artys7 <enjoy-digital>
|\
| * bbb1ded - Added Arty S7 board <Staf Verhaegen>
|/
* 188d4a4 - targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. <Florent Kermarrec>
* ca197af - targets/simple: use CRG from litex.build. <Florent Kermarrec>
* b8a648d - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 4d7135f - platforms/versa_ecp5: remove LatticeProgrammer (no longer used since we can now use OpenOCD). <Florent Kermarrec>
* 2cf3c3e - platforms: cosmetic cleanups. <Florent Kermarrec>
* df5de88 - platforms/ulx3s: cleanup, fix user_leds, add PULLMODE/DRIVE constraints on SDRAM. <Florent Kermarrec>
* 467b14a - colorlight_5a_75b: minor comment changes. <Florent Kermarrec>
* 7157b40 - Merge pull request timvideos#64 from david-sawatzke/improve_colorlight_v6.1 <enjoy-digital>
|\
| * 15a27d4 - targets/colorlight_5a_75b: Change baudrate to work on v6.1 <David Sawatzke>
| * 4fc9df8 - colorlight_5a_75b/v6.1: Add eth_clock & serial pins <David Sawatzke>
| * 4ddde31 - colorlight_5a_75b/v6.1: Fix bank activate pin <David Sawatzke>
|/
* a80737e - test/test_targets: fix typo. <Florent Kermarrec>
* 9b3f16a - Merge pull request timvideos#62 from ilya-epifanov/ecp5-evn-button1-and-spi-flash-ios <enjoy-digital>
|\
| * a43072a - ECP5-EVN board: Added BUTTON_1 and SPI flash pins to IOs <Ilya Epifanov>
* db67dff - targets/de10lite: use Max10PLL, remove 50MHz limitation. <Florent Kermarrec>
* 9fe9821 - test/test_targets: add c10lprefkit. <Florent Kermarrec>
* 8ccab03 - targets/c10lprefkit: use Cyclone10LPPLL, remove 50MHz limitation. <Florent Kermarrec>
* 4cdc121 - targets/de10nano: use CycloneVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 2d8a4ef - targets/de1_soc: use CycloneVPLL, remove 50MHz limitation. <Florent Kermarrec>
* cec4cbb - targets/de2_115: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 1fac607 - targets/de0nano: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 5f629c2 - targets/vcu118: fix clk500 typo. <Florent Kermarrec>
* d7b9212 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 5e1da47 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* migen changed from 0.6.dev-335-g3f9809b to 0.6.dev-337-g19d5eae
* 19d5eae - zc706: fix user_led I/O standards <Sebastien Bourdeauducq>
* 21fea57 - zc706: fix indentation/style <Sebastien Bourdeauducq>
Full submodule status
--
3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (remotes/origin/HEAD)
3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (remotes/origin/HEAD)
de55a8e17046ffd6bf68d1c0d606088abdb37950 litedram (remotes/origin/HEAD)
705003e5231436de9a276e8f834564c6fbe90a1e liteeth (remotes/origin/HEAD)
6fdd02058fba29008c90b162e0ef707dce15ebeb liteiclink (remotes/origin/HEAD)
586ef787946512087a64fb60b79bdafe39aee6d0 litepcie (remotes/origin/HEAD)
2e5c5b12d52f695f4560ca7dd08b4170d7568715 litesata (remotes/origin/HEAD)
54488c0f4d6e9e953f1a0de3d578915a5e4ccddf litescope (remotes/origin/HEAD)
7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master)
41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (remotes/origin/HEAD)
2d018826532e486b94615c6b9cee4f16a924dba2 litex (remotes/origin/HEAD)
cb959628506e61cae2d7be05276bba8f42138cfb litex-boards (remotes/origin/HEAD)
7da392963878842f93f09a7a218c1052ae5e45d6 litex-renode (realign_memory.0~2)
19d5eae29b9ff57ea11540252f79ad1a9526ff3a migen (0.6.dev-337-g19d5eae)
8f5a253b22cd4ebcd56304a3662f4c70e3b34ed5 nmigen (v0.1-69-g8f5a253)
mateusz-holenko
added a commit
to antmicro/litex-buildenv
that referenced
this issue
Apr 20, 2020
* litedram changed from b06e946 to de55a8e
* de55a8e - test/test_bandwidth: review, cleanup, fix typo. <Florent Kermarrec>
* 907ef73 - test/test_wishbone: add comments/cleanup. <Florent Kermarrec>
* 02fd39c - test/test_fifo: add comments. <Florent Kermarrec>
* 14edb5b - test/test_dma: add comments. <Florent Kermarrec>
* 97e214b - test/test_bist: add comments, fix a typo. <Florent Kermarrec>
* c55136c - test/test_bist: enable test_bist_csr_cdc (now passing with refactored CDC). <Florent Kermarrec>
* 92e34d4 - frontend/bist: simplify and fix CDC using AsyncFIFO. <Florent Kermarrec>
* 378c441 - frontend/bist: rename run/ready to run_cascade_in/run_cascade_out. <Florent Kermarrec>
* 829dee6 - frontend/bist: remove run/ready CSR. <Florent Kermarrec>
* b399ae2 - test/benchmark: default value of run is 1, no need to drive it. <Florent Kermarrec>
* 7c5e1e7 - frontend/bist: remove wrong comment and don't increment ticks when waiting. <Florent Kermarrec>
* 4dbb5b1 - test/run_benchmarks: fix syntax. <Florent Kermarrec>
* 966ebcb - test: cleanup/uniformize things between tests. <Florent Kermarrec>
* 0efd619 - test/test_adaption: review, add some comments. <Florent Kermarrec>
* 38b78fc - test/run_benchmarks: review, minor styles changes. <Florent Kermarrec>
* 962dcd7 - phy/model: review/cleanup DFITimingsChecker. <Florent Kermarrec>
* 64c2be5 - README: switch to markdown. <Florent Kermarrec>
* 835825b - Merge pull request timvideos#179 from antmicro/jboc/docs <enjoy-digital>
|\
| * dbac83f - core: add missing docstrings <Jędrzej Boczar>
| * 1f246cb - core/crossbar: remove dead code <Jędrzej Boczar>
* | 969943e - Merge pull request timvideos#178 from antmicro/jboc/unit-tests-crossbar <enjoy-digital>
|\ \
| * | 8a0bcb3 - test: add core.crossbar tests <Jędrzej Boczar>
| * | e74a2e6 - test: fix missing cases in bankmachine test <Jędrzej Boczar>
* | | 06965b7 - phy/gensdrphy: simplify using SDRTristate, change SDROutput/SDRInput to single-bit. <Florent Kermarrec>
* | | 9d20642 - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* | | b9f4d99 - phy/gensdrphy: use SDRInput, SDROutput to allow infered or instantiated IO regs. <Florent Kermarrec>
|/ /
* | 36d62d5 - Merge pull request timvideos#177 from antmicro/jboc/unit-tests-bankmachine <enjoy-digital>
|\ \
| * | 7b8b68a - test: add core.bankmachine tests <Jędrzej Boczar>
| |/
* | 492b9fa - Merge pull request timvideos#175 from antmicro/jboc/unit-tests-bandwidth <enjoy-digital>
|\ \
| * | f0496b2 - core/bandwidth: avoid missing a command <Jędrzej Boczar>
| * | c03bed8 - test: add core.bandwidth.Bandwidth tests <Jędrzej Boczar>
* | | cc7621d - Merge pull request timvideos#173 from antmicro/jboc/unit-tests <enjoy-digital>
|\| |
| * | a62e59b - test: skip _CommandChooser tests from Issue timvideos#174 <Jędrzej Boczar>
| * | 00fcdf6 - test: split core.multiplexer tests into separate files <Jędrzej Boczar>
| * | f619bed - test: clean up the code of core.multiplexer <Jędrzej Boczar>
| * | 1dd4227 - test: add core.multiplexer.Multiplexer tests <Jędrzej Boczar>
| * | ea93246 - test: add comments to core.multiplexer._Steerer tests <Jędrzej Boczar>
| * | 26ce993 - test: add core.multiplexer._Steerer tests <Jędrzej Boczar>
| * | f36b5a4 - test: add core.multiplexer._CommandChooser tests <Jędrzej Boczar>
| * | a1b1abe - test: use TestCase.subTest for more verbose error messages <Jędrzej Boczar>
| /
* / e7cd6a7 - .travis.yml: udpate to keep it similar with others .travis.yml files. <Florent Kermarrec>
|/
* 0c3a610 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* a98f51e - dfii: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* 96b273c - common/BitSlip: use reset_less on intermediate signal. <Florent Kermarrec>
* liteeth changed from fb47853 to 705003e
* 705003e - README: switch to markdown. <Florent Kermarrec>
* 92c3048 - examples: use CRG from litex.build. <Florent Kermarrec>
* 3bd807c - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 6ec7038 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 47a2e5b - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* ab55304 - mac/sram: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* liteiclink changed from 370855d to 6fdd020
* 6fdd020 - README: switch to markdown. <Florent Kermarrec>
* c4edb7e - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 1dcea14 - .travis.yml: fix git clone error. <Florent Kermarrec>
* e6ab98a - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litepcie changed from 5b7e7cd to 586ef78
* 586ef78 - README: switch to markdown. <Florent Kermarrec>
* 3e24df2 - README: add Xilinx Ultrascale support. <Florent Kermarrec>
* 81b3e13 - examples: add KCU105 example. (PCIe gen2 X4). <Florent Kermarrec>
* 32d64e4 - phy: add initial Ultrascale PHY (gen2 X4). <Florent Kermarrec>
* bb7a1e0 - phy/xilinx_us_x4: adaptations on packets to expose/receive standardized TLPs. <Florent Kermarrec>
* 1f28c9f - phy: add xilinx_us_x4. <Florent Kermarrec>
* a65aab9 - examples/kc705: cleanup, enable bridge and generate csr.csv. <Florent Kermarrec>
* 0748af1 - litepcie/common: update import. <Florent Kermarrec>
* 6bcafc4 - .travis.yml: fix git clone error. <Florent Kermarrec>
* fde0c62 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* 3dd6185 - soc/cores: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* 2a1c2e7 - phy: use reset_less on id/max_request_size/max_payload_size. <Florent Kermarrec>
* litesata changed from 1e3573b to 2e5c5b1
* 2e5c5b1 - README: switch to markdown. <Florent Kermarrec>
* 71e0210 - .travis.yml: fix git clone error. <Florent Kermarrec>
* e3a980e - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litescope changed from b3d1e69 to 54488c0
* 54488c0 - README: switch to markdown. <Florent Kermarrec>
* 72277ff - examples: use CRG from litex.build. <Florent Kermarrec>
* a05312d - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 5701c52 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 47819e8 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litevideo changed from 49d8126 to 41f3014
* 41f3014 - README: switch to markdown. <Florent Kermarrec>
* 6958c21 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* litex changed from 536ae0e6 to 2d018826
* 2d018826 - setup.py/install_requires: add requests. <Florent Kermarrec>
* 5e149ced - build/generic_programmer: add automatic search/download of flash_proxy in repositories if not available locally. <Florent Kermarrec>
* a298a9e5 - Merge pull request timvideos#467 from antmicro/region_type_fix <enjoy-digital>
|\
| * 77a05b78 - soc_core: Fix region type generation <Mateusz Holenko>
|/
* d44fe18b - stream/AsyncFIFO: add default depth (useful when used for CDC). <Florent Kermarrec>
* ded10c89 - build/sim/core/Makefile: add -p to mkdir modules. <Florent Kermarrec>
* c323e94c - Merge pull request timvideos#464 from mithro/litex-sim-fixes <enjoy-digital>
|\
| * 97d0c525 - Remove trailing whitespace. <Tim 'mithro' Ansell>
| * 5a0bb6ee - litex_sim: Rework Makefiles to put output files in gateware directory. <Tim 'mithro' Ansell>
| * a0658421 - litex_sim: Better error messages on failure to load module. <Tim 'mithro' Ansell>
* | a8bf0216 - litex_setup: raise exception on update if repository has been been initialized. <Florent Kermarrec>
* | 4fe31f07 - cores: add External Memory Interface (EMIF) Wishbone bridge. <Florent Kermarrec>
* | 44746870 - Merge pull request timvideos#462 from ironsteel/trellis-12k <enjoy-digital>
|\ \
| |/
|/|
| * c57e438d - boards/targets/ulx3s.py: Update --device option help message <Rangel Ivanov>
| * f4b345ec - build/lattice/trellis.py: Add 12k device <Rangel Ivanov>
|/
* d0d2f282 - README: LiteDRAM moved to travis-ci.com as others repositories. <Florent Kermarrec>
* b95e0a19 - altera/common: add DDROutput, DDRInput, SDROutput, SDRInput. <Florent Kermarrec>
* 40f43efc - targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. <Florent Kermarrec>
* 292d6b75 - build/xilinx/common: add Spartan6 specialized DDRInput, SDROutput, SDRInput and SDRTristate. <Florent Kermarrec>
* 88dc5158 - build/io: add SDR Tristate (with infered version) and remove multi-bits support on SDRIO. <Florent Kermarrec>
* fdadbd86 - build/lattice/common: remove multi-bits support on SDRInput/Output. <Florent Kermarrec>
* 8159b65b - litex/build/io: also import CRG (since using DifferentialInput). <Florent Kermarrec>
* 79913e86 - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 8e014f76 - litex/build: move io.py from litex/gen and re-import DifferentialInput/Output, DDRInput/Output contributed to Migen. <Florent Kermarrec>
* 2e270cf2 - platforms/versa_ecp5: remove Lattice Programmer (no longer used since we can now use OpenOCD). <Florent Kermarrec>
* deebc49a - boards/platforms: cosmetic cleanups. <Florent Kermarrec>
* 3c0ba8ae - boards/plarforms/ulx3s: cleanup, fix user_leds, add spisdcard, add PULLMODE/DRIVE on SDRAM pins. <Florent Kermarrec>
* 6c429c99 - build/lattice: add ECP5 implementation for SDRInput/SDROutput. <Florent Kermarrec>
* 72c8d590 - litex/gen: add io with SDRInput/SDROutput (if not overrided, register is supposed to be infered). <Florent Kermarrec>
* 8f57321f - tools/litex_sim: remove LiteSPI support for now since breaking Travis-CI of others sub-projects. <Florent Kermarrec>
* 9afd017a - tools/litex_term: increase workaround delay for usb_fifo. (validated on Minispartan6 and MimasA7). <Florent Kermarrec>
* fdfede22 - Merge pull request timvideos#459 from mithro/travis-fix <enjoy-digital>
|\
| * cb7e3099 - travis: Run Windows build but allow it to fail. <Tim 'mithro' Ansell>
| * 43242012 - travis: Use litex_setup.py from the checked out code. <Tim 'mithro' Ansell>
|/
* 30f5faf9 - Merge pull request timvideos#458 from david-sawatzke/add_triple <Tim Ansell>
|\
| * d69b4443 - Add riscv64-none-elf triple <David Sawatzke>
|/
* 14bf8b81 - soc/cores/clock: add Max10PLL. <Florent Kermarrec>
* 2470ef50 - soc/cores/clock: add Cyclone10LPPLL. <Florent Kermarrec>
* f8d6d0fd - soc/cores/clock/CycloneVPLL: fix typos. <Florent Kermarrec>
* 970c8de4 - soc/cores/clock: rename Altera to Intel. <Florent Kermarrec>
* 383fcd36 - soc/cores/clock: add CycloneVPLL. <Florent Kermarrec>
* ab4906ea - targets/de0nano: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 0f17547c - soc/cores/clock: add initial AlteraClocking/CycloneIV support. <Florent Kermarrec>
* 3575d03f - .travis.yml: disable windows test (failing for now). <Florent Kermarrec>
* 2ca853fd - README.md: update RISCV toolchain installation. <Florent Kermarrec>
* d770bfbf - .travis.yml: remove Python3.5 test. <Florent Kermarrec>
* bc26af0d - Merge pull request timvideos#451 from mithro/multi-os <enjoy-digital>
|\
| * 3305a65b - Enable testing on multiple Python versions. <Tim 'mithro' Ansell>
| * 6bd5eae4 - Enable CI for Windows and Mac. <Tim 'mithro' Ansell>
* | 30d25ffe - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* | 3f1159fa - litex_setup: reorganize a bit, add separators/comments. <Florent Kermarrec>
* | 926f961b - .travis.yml: revert full url for litex_setup.py. <Florent Kermarrec>
* | 447e8d94 - Merge pull request timvideos#452 from mithro/riscv-download <enjoy-digital>
|\|
| * 9e324d9e - Remove symlinking step. <Tim 'mithro' Ansell>
| * 7f0ecddf - Use shutil.unpack_archive. <Tim 'mithro' Ansell>
| * a1dd8fc8 - Ignore SSL errors on CI. <Tim 'mithro' Ansell>
| * 2b2aff12 - Improve the path messages a little. <Tim 'mithro' Ansell>
| * 141644d1 - Make travis use litex_setup.py for GCC download. <Tim 'mithro' Ansell>
| * 6adabae7 - Adding SiFive RISC-V toolchain downloading to litex_setup.py <Tim 'mithro' Ansell>
| * 59b7db63 - Fix alignments. <Tim 'mithro' Ansell>
|/
* e408fb8f - Merge pull request timvideos#450 from mithro/litex-setup-fix <enjoy-digital>
|\
| * d781bf20 - Run `litex_setup.py` outside the git clone directory. <Tim 'mithro' Ansell>
| * dd59dac5 - litex_setup: Use subprocess so failures are noticed. <Tim 'mithro' Ansell>
|/
* 0f352cd6 - soc/cores: use reset_less on datapath/configuration CSRStorages. <Florent Kermarrec>
* a67ab418 - interconnect/csr: add reset_less parameter. <Florent Kermarrec>
* 05b1b778 - interconnect/csr, wishbone: use reset_less on datapath signals. <Florent Kermarrec>
* b95965de - cores/code_8b10b: set reset_less to True on datapath signals. <Florent Kermarrec>
* a35df4f7 - stream: set reset_less to True on datapath signals. <Florent Kermarrec>
* cf1c5d99 - Merge pull request timvideos#448 from kessam/patch-1 <enjoy-digital>
|\
| * fb532f5e - Fix timing constraints <kessam>
|/
* 60431083 - soc/cores/clock/ECP5PLL: add CLKI_DIV support. <Florent Kermarrec>
* 27f00851 - Merge pull request timvideos#447 from antmicro/spi-xip <enjoy-digital>
|\
| * 81be74a7 - targets: netv2: add LiteSPI <Piotr Binkowski>
| * 946cb164 - platform: netv2: update SPI flash pinout <Piotr Binkowski>
| * 31fceb0a - litex_sim: add LiteSPI <Piotr Binkowski>
| * ff04869c - litex_setup: add litespi core <Piotr Binkowski>
* | 91981b96 - soc/cores/uart: use reset_less on accumulator, reg, bitcount to reduce. <Florent Kermarrec>
* | 87160059 - soc/cores/spi_flash: add ECP5SPIFlash (non-memory-mapped). <Florent Kermarrec>
* | e3445f6c - Merge pull request timvideos#444 from ilya-epifanov/openocd-jtag-programmer <enjoy-digital>
|\ \
| * | 351551a0 - Added openocd jtagspi programmer, to be used with ECP5-EVN board <Ilya Epifanov>
* | | aeb9411a - Merge pull request timvideos#441 from gsomlo/gls-spisdcard-fixes <enjoy-digital>
|\ \ \
| * | | 8473ed56 - software/bios: add spisdcardboot() to boot_sequence() <Gabriel Somlo>
| * | | e9054ef6 - software/libbase/spisdcard: add delay to goidle loop <Gabriel Somlo>
| * | | c6b6dee2 - software/bios: factor out busy_wait() function <Gabriel Somlo>
| * | | 540218b2 - software/libbase/spisdcard: fix width of address parameter <Gabriel Somlo>
|/ / /
* | | 2e48ab56 - soc/cores/spi: make dynamic clk divider optional (can be enabled with add_clk_divider method) and only use it in add_spi_sdcard. <Florent Kermarrec>
* | | 86eec1a4 - Merge pull request timvideos#439 from antmicro/fix-compiler-rt <enjoy-digital>
|\ \ \
| |_|/
|/| |
| * | 5fa2cc66 - Update removed llvm compiler-rt repo <Kamil Rakoczy>
|/ /
* | 4abb3715 - targets/add_constant: avoid specifying value when value is None (=default). <Florent Kermarrec>
* | 73b43475 - software/libbase/spisdcard: add USE_SPISDCARD_RECLOCKING define to easily disable reclocking. <Florent Kermarrec>
* | b509df8b - integration/soc/add_uart: add USB CDC support (with ValentyUSB core). <Florent Kermarrec>
* | 76872a7a - tools/litex_sim: simplify using uart_name=sim. <Florent Kermarrec>
* | 09a3ce0e - integration/soc/add_uart: add Model/Sim. <Florent Kermarrec>
* | 3f43c6a2 - integration/soc/add_uart: cleanup. <Florent Kermarrec>
|/
* 5bcf730c - build/tools: add replace_in_file function. <Florent Kermarrec>
* ffe83ef0 - tools/litex_term: use 64 bytes as default payload_lengh (work for all confniguration) and add small delay between frames for FT245 FIFO. <Florent Kermarrec>
* 8f2e3692 - bios/boot: update comments. <Florent Kermarrec>
* 1746b57a - Merge pull request timvideos#437 from feliks-montez/bugfix/fix-serialboot-frames <enjoy-digital>
|\
| * ebdc38fc - flush rx buffer when bad crc and fix frame payload length <Feliks>
* | c154d8d2 - test/test_targets: remove versa_ecp3. <Florent Kermarrec>
* | 8d999081 - boards/targets: update SDRAM to use new GENSDRPHY and new ECP5PLL phase support. <Florent Kermarrec>
* | 3eb08c7d - boards/platforms: remove versa_ecp3 (ECP3 no longer supported). <Florent Kermarrec>
* | eb641695 - build/lattice/diamond: remove ECP3 support. (ECP3 is not used and no longer interesting now that ECP5 has an open-source toolchain). <Florent Kermarrec>
* | bba5f182 - cores/clock/ECP5PLL: add phase support. <Florent Kermarrec>
* | 0123ccc8 - build/lattice/common: change LatticeECPXDDROutputImpl from ECP3 to ECP5. <Florent Kermarrec>
* | 5a402264 - Fix off-by-one error on almost full condition for prefetch <bunnie>
|/
* d62ef38c - soc/doc/csr: allow CSRField.reset to be a Migen Constant. <Florent Kermarrec>
* 4adac90d - cpu/vexriscv/mem_map_linux: move main_ram to allow up to 1GB. <Florent Kermarrec>
* 63ab2ba4 - software/bios/boot/linux: move emulator.bin to main_ram and allow defining custom ram offsets. <Florent Kermarrec>
* d9984754 - targets: remove Etherbone imports. <Florent Kermarrec>
* 3b04efbc - targets: switch to add_etherbone method. <Florent Kermarrec>
* 5ad7a3b7 - integration/soc: add add_etherbone method. <Florent Kermarrec>
* d6b0819e - integration/soc/add_ethernet: add name parameter (defaults to ethmac). <Florent Kermarrec>
* 930679ef - targets: always use sys_clk_freq on SDRAM modules. <Florent Kermarrec>
* ae6ef923 - targets: fix typos in previous changes. <Florent Kermarrec>
* c547b2cc - Merge pull request timvideos#436 from rob-ng15/master <enjoy-digital>
|\
| * 2bf31a31 - Reclock spi sdcard access after initialisation <rob-ng15>
* | 011773af - Merge pull request timvideos#435 from enjoy-digital/spi_master_clk_divider <enjoy-digital>
|\ \
| |/
|/|
| * 61c9e54a - soc/core/spi: add Clk Divider CSR (defaults to sys_clk_freq/spi_clk_freq). <Florent Kermarrec>
* | f03d862c - targets: switch to add_ethernet method instead of EthernetSoC. <Florent Kermarrec>
* | 4e9a8ffe - targets: switch to SoCCore/add_sdram instead of SoCSDRAM. <Florent Kermarrec>
|/
* dd7718b4 - targets/arty: use new ISERDESE2 MEMORY mode. <Florent Kermarrec>
* fca52d11 - Merge branch 'master' of http://github.com/enjoy-digital/litex <Florent Kermarrec>
|\
| * 0f356648 - Merge pull request timvideos#434 from rob-ng15/master <enjoy-digital>
| |\
| | * f3c23377 - Use <stdint.h> to provide structure sizes <rob-ng15>
| | * c2ebbcbf - Use <stdint.h> for structure sizes <rob-ng15>
| |/
* / ccf73639 - integration/soc: add add_spi_flash method to add SPI Flash support to the SoC. <Florent Kermarrec>
|/
* ec3e0686 - targets/nexys4ddr: use LiteXSoC's add_spi_sdcard method. <Florent Kermarrec>
* d276036f - integration/soc: add add_spi_sdcard method to add SPI mode SDCard support to the SoC. <Florent Kermarrec>
* 60445709 - Merge pull request timvideos#433 from gsomlo/gls-rocket-spisdcard <enjoy-digital>
|\
| * b960d7c5 - targets/nexys4ddr: add '--with-spi-sdcard' build option <Gabriel Somlo>
| * 7a7b8905 - platforms/nexys4ddr: add spisdcard pins. <Gabriel Somlo>
| * af4de03f - targets/nexys4ddr: make sdcard reset conditional <Gabriel Somlo>
| * a33916bc - software/libbase/spisdcard: fix 4-byte FAT fields on 64-bit CPUs <Gabriel Somlo>
| * 1f90abea - bios: make SPI SDCard boot configs other than linux-on-litex-vexriscv <Gabriel Somlo>
| * c2938dc9 - bios/boot.c: cosmetic: re-indent spisdcardboot() for consistency <Gabriel Somlo>
* | fbadfa17 - Merge pull request timvideos#432 from esden/csr-doc-fix-int <Sean Cross>
|\ \
| |/
|/|
| * 27988672 - Don't let python convert lane number to float. <Piotr Esden-Tempski>
|/
* dd07a0ad - Merge pull request timvideos#431 from antmicro/hybrid-mac <enjoy-digital>
|\
| * 96a265a4 - litex_sim: add support for hybrid mac <Piotr Binkowski>
* 37f25ed3 - software/libbase/bios: rename spi.c/h to spisdcard.h, also rename functions. <Florent Kermarrec>
* 93925634 - software/bios/main: revert USDDRPHY_DEBUG (merge issue with SPI SD CARD PR). <Florent Kermarrec>
* 8fe9e72f - Merge pull request timvideos#429 from rob-ng15/master <enjoy-digital>
|\
| * 27720409 - SPI hardware bitbanging from SD CARD <rob-ng15>
| * d45dda73 - SPI hardware bitbanging from SD CARD <rob-ng15>
| * 50b6db6a - SPI hardware bitbanging from SD CARD <rob-ng15>
* | 9e1cd842 - Merge pull request timvideos#430 from gsomlo/gls-sdclk-stub <enjoy-digital>
|\ \
| * | b2103f4a - bios/sdcard: provide sdclk_set_clk() stub for clocker-less targets <Gabriel Somlo>
|/ /
* / e8651629 - platforms/kcu105: fix pcie tx0 p/n swap. <Florent Kermarrec>
|/
* 2c4b8963 - soc/cores/clock: make sure specific clkoutn_divide_range is only used as a fallback solution. <Florent Kermarrec>
* litex-boards changed from a7fbe0a to cb95962
* cb95962 - targets/ulx3s and colorlight_5a_75b: cleanup USB ACM addition and only keep USB ACM changes. <Florent Kermarrec>
* 4b4f2f9 - Merge pull request timvideos#67 from mubes/ecp5_usb <enjoy-digital>
|\
| * f79a010 - Addition of flash for colorlight board <Dave Marples>
| * 389e8aa - Addition of USB ACM for ECP5 <Dave Marples>
|/
* a12faae - targets/colorlight_5a_75b: increase sys_ps phase (fixes memtest). <Florent Kermarrec>
* 52c9648 - arty_s7: fix copyrights, rename to arty_s7, various minor changes to make it similar to others targets. <Florent Kermarrec>
* 0cee59c - Merge pull request timvideos#65 from Fatsie/artys7 <enjoy-digital>
|\
| * bbb1ded - Added Arty S7 board <Staf Verhaegen>
|/
* 188d4a4 - targets: use DDROutput on sdram_clock and similar configuration for all SDRAM targets. <Florent Kermarrec>
* ca197af - targets/simple: use CRG from litex.build. <Florent Kermarrec>
* b8a648d - litex.build: update from migen.genlib.io litex.build.io. <Florent Kermarrec>
* 4d7135f - platforms/versa_ecp5: remove LatticeProgrammer (no longer used since we can now use OpenOCD). <Florent Kermarrec>
* 2cf3c3e - platforms: cosmetic cleanups. <Florent Kermarrec>
* df5de88 - platforms/ulx3s: cleanup, fix user_leds, add PULLMODE/DRIVE constraints on SDRAM. <Florent Kermarrec>
* 467b14a - colorlight_5a_75b: minor comment changes. <Florent Kermarrec>
* 7157b40 - Merge pull request timvideos#64 from david-sawatzke/improve_colorlight_v6.1 <enjoy-digital>
|\
| * 15a27d4 - targets/colorlight_5a_75b: Change baudrate to work on v6.1 <David Sawatzke>
| * 4fc9df8 - colorlight_5a_75b/v6.1: Add eth_clock & serial pins <David Sawatzke>
| * 4ddde31 - colorlight_5a_75b/v6.1: Fix bank activate pin <David Sawatzke>
|/
* a80737e - test/test_targets: fix typo. <Florent Kermarrec>
* 9b3f16a - Merge pull request timvideos#62 from ilya-epifanov/ecp5-evn-button1-and-spi-flash-ios <enjoy-digital>
|\
| * a43072a - ECP5-EVN board: Added BUTTON_1 and SPI flash pins to IOs <Ilya Epifanov>
* db67dff - targets/de10lite: use Max10PLL, remove 50MHz limitation. <Florent Kermarrec>
* 9fe9821 - test/test_targets: add c10lprefkit. <Florent Kermarrec>
* 8ccab03 - targets/c10lprefkit: use Cyclone10LPPLL, remove 50MHz limitation. <Florent Kermarrec>
* 4cdc121 - targets/de10nano: use CycloneVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 2d8a4ef - targets/de1_soc: use CycloneVPLL, remove 50MHz limitation. <Florent Kermarrec>
* cec4cbb - targets/de2_115: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 1fac607 - targets/de0nano: use CycloneIVPLL, remove 50MHz limitation. <Florent Kermarrec>
* 5f629c2 - targets/vcu118: fix clk500 typo. <Florent Kermarrec>
* d7b9212 - .travis.yml: fix git clone error. <Florent Kermarrec>
* 5e1da47 - setup.py: simplify, switch to Python3.6+ (using python_requires), remove version. <Florent Kermarrec>
* migen changed from 0.6.dev-335-g3f9809b to 0.6.dev-337-g19d5eae
* 19d5eae - zc706: fix user_led I/O standards <Sebastien Bourdeauducq>
* 21fea57 - zc706: fix indentation/style <Sebastien Bourdeauducq>
Full submodule status
--
3a6108a75be356a3dc53760d22782f1323248b6b edid-decode (remotes/origin/HEAD)
3a06aa84b62ad24467fb0d2c6ceddf565e9ea447 flash_proxies (remotes/origin/HEAD)
de55a8e17046ffd6bf68d1c0d606088abdb37950 litedram (remotes/origin/HEAD)
705003e5231436de9a276e8f834564c6fbe90a1e liteeth (remotes/origin/HEAD)
6fdd02058fba29008c90b162e0ef707dce15ebeb liteiclink (remotes/origin/HEAD)
586ef787946512087a64fb60b79bdafe39aee6d0 litepcie (remotes/origin/HEAD)
2e5c5b12d52f695f4560ca7dd08b4170d7568715 litesata (remotes/origin/HEAD)
54488c0f4d6e9e953f1a0de3d578915a5e4ccddf litescope (remotes/origin/HEAD)
7457a29b1a47fe15e81fa37f3bbdd510788f1d53 liteusb (heads/master)
41f30143075ece3fff5c33a332ed067d1837cbb3 litevideo (remotes/origin/HEAD)
2d018826532e486b94615c6b9cee4f16a924dba2 litex (remotes/origin/HEAD)
cb959628506e61cae2d7be05276bba8f42138cfb litex-boards (remotes/origin/HEAD)
7da392963878842f93f09a7a218c1052ae5e45d6 litex-renode (realign_memory.0~2)
19d5eae29b9ff57ea11540252f79ad1a9526ff3a migen (0.6.dev-337-g19d5eae)
8f5a253b22cd4ebcd56304a3662f4c70e3b34ed5 nmigen (v0.1-69-g8f5a253)
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I don't think I'd call this a "bug" but thought I'd at least open an issue so that others can more quickly find a way around this install issue.
I am installing litex inside a VM running on MacOS. I generally like to install software on a shared folder to the host OS, so that I can edit files using native editors without transferring back and forth to the VM.
After cloning the repo, the
download-env.shscript kept failing for me during the conda ncurses installation. I eventually realized it's because the build folder is inside this shared folder, and MacOS has a case-insensitive filesystem.Solution was:
The
ln -sstep allows the build folder to be on a case-sensitive filesystem while the rest of the checkout is still in the case-insensitive shared folder.The text was updated successfully, but these errors were encountered: