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[TOPIC-GPIO] convert 2-pin test to new API #19249
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Not specific to your changes, but do we need a readme or something that describes how to setup this test from a hw point of view. I'm assuming one needs to wire one GPIO to another or something for this all to work.
But not seeing anything obvious about what that setup might be
Documentation on the test requirements would be helpful; right now it's in |
With your test addition is it just one pin as output and one as input? |
It's two pins on the same controller wired together, like it says in the header. No change from the original. One is nominally output, one is input, but there's no specific promise that the pins aren't configured in other ways. There's a performance test addition not in this PR that uses additional pins, but it doesn't require any specific wiring. |
@galak @mnkp I've put back the tests for the interrupts. I've only tested this on nrf52840_pca10056 at the moment, though it had previously been tested on all converted platforms. This probably breaks shippable, since the test will work only on drivers that have been updated. I believe we've agreed to accept that on the topic branch. If not, I don't see how we can test anything. |
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properties: | ||
gpios: | ||
type: compound |
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type: phandle-array
resources { | ||
compatible = "test,resources"; | ||
gpios = | ||
<&gpioc 16 0>, <&gpioc 17 0>, |
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Just curious how this set or why its this set of GPIOs?
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I needed two on the same port, hence C16 and C17 (also those are Arduino D0 and D1, which made some sense).
For the performance test that isn't in this PR I needed more on the same port, so added the others. They can be taken out.
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So I wondering if we can end up having a general test overlay per board.
Also wondering about having a bindings searched for in the project dir.
Why would it break shippable? seems to fully pass from a build point of view. |
I don't think so, and suggest some difference in test requirements in the commit message.
I don't know what you mean by this. Ideally the overlays would be in the
Yes, it does build. I think at one point there was a change that did break builds; possibly pabigot@6c9de37 which is a little out of date, and might have caused problems in its original context but maybe not now. It'll need to go in sometime. I figure to do it separately. |
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@galak I've corrected the binding, updated the rationale for pins k64f pins, and added an overlay for same70. Tried to get same70 to work but it like k64f appears to require pinmux, but unlike k64f there aren't enough same70 examples to figure out how to configure the pins. Looks like double-edge passes on Nordic, fails on EFR32 and MCUX. The test works by toggling the output state within the callback, which should immediately flag a second state change. It may be that the way the interrupt is handled prevents the state change from being noticed. IMO this should be expected to work as intended so I'm going to assume this is a driver problem until somebody shows why it isn't. |
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properties: | ||
gpios: | ||
type: phandle-array |
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DTS was created as a way to describe the hardware and its initial configuration during the boot process. So far we've kept the promise. gpios
property is always attached to a hardware module. Even "gpio-leds"
and "gpio-keys"
bindings that we use to instantiate LEDs and buttons refer to real hardware. In this case we break that contract since "test,resources"
is not a piece of hardware.
I'm personally not against introducing such a "virtual" component. It does solve neatly a class of problems. However, if we do so I would rather have a solution that's more general. IMHO the #18544 does a much better job at this.
Another way of handling the issue, which I believe would be more in line with the spirit of DTS, would be to add gpios
property directly to the soc
node. Since that's what we actually want to do, we need to name some pins that belong to SoC and attach them to the respective gpio-controller
.
The third option, that I see, would be to stick with what we've been doing so far: no virtual components, no gpios
property attached to the soc
node, instead nodes that describe a real piece of hardware. In terms of hardware resources that we need to run the tests we should have a way to describe a short and probably also a pin that is not connected.
Taking into account @mnkp's comments I've reworked this to use a test-specific binding that identifies the hardware required to run this application. I've also added a cmake patch so we can get the overlays out of the test root. Hopefully this will be an acceptable path forward that won't involve major devicetree-related design discussions. I'll submit the cmake patch to master separately. |
compatible: "test,gpio_basic_api" | ||
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properties: | ||
gpios: |
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would it make sense for this to be:
resources {
compatible = "test,gpio_basic_api";
/* Arduino D0, D1 */
in-gpios = <&gpiof 6 0>;
out-gpios = <&gpiof 5 0>;
};
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Yes. Updated PR, and added check for incompatible controllers.
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This PR proposes to keep overlay files in a per testcase directory. This makes tests completely unmaintainable and is a terrible idea. The long term goal is to have part of the test suite running on the real hardware. This means we should have some dedicated, custom test boards each of which can run maximum amount of the testcases. As such we should aim at reusing special resources and custom configurations employed on the board. GPIO pins which are physically shorted should be made available to all the testcases which may make use of it: e.g. remaining GPIO, as well as I2S or SPI testcases. Having a dozens of dedicated hardware boards crafted for a single testcase just doesn't go with the automated test suite.
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Would be nice if we could add the core changes to the test and resolve the DT stuff later. |
The test needs something to provide the required resources. I've made my proposal; if it needs to be reworked later that's fine, but I don't think we should be expected to achieve the long-term goal now, and I don't see an actionable alternative being proposed. |
I'm good with merging this as its a step forward and while I agree with @mnkp I don't have a great answer and this at least makes things work for this test - until we have some defined hardware shield or something that could be utilized across a wider set of tests. |
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Test assumes both pins are on same device.
I think we should not impose this constraint, specially if we want to enable tests with pre-defined generic test pins like ardiuno D0/D1.
@erwango Is this a requirement you wish to impose before we merge the test to the topic branch? As it stands we have no merged test that covers the functional requirements of the drivers. I understand and in general support the desire to do things right rather than do them over, but we also need to complete and provide the basic tools necessary so we can ask people to port the drivers. There are no in-tree boards with arduino-header compatibles where D0 and D1 are not on the same peripheral, which is beside the point as this test does not currently use the arduino map. Could we perhaps move forward now, and address cross-device support in the context of a separate future discussion of how the pins should be specified? |
@pabigot, I'm fine to do that later, but then maybe we should add an error check if PIN_IN and PIN_OUT are on a different device ? |
@erwango that's currently done in |
@pabigot, ok, right, just seen and tested. Works perfectly. Let's go with it then. Removing my nack (not acking though, since I'm still testing) |
Test that the new port API functions all behave as expected, including physical vs logical level for input and output as well as masked and set-based output operations. Also tests the new pin API functions. For running on real hardware this test now uses a local test-specific devicetree binding. For build-only tests any platform with a GPIO alias should be tested. The new code increases flash requirements so add a filter to exclude platforms that won't link. Signed-off-by: Peter Bigot <[email protected]>
Switch to gpio_pin_interrupt_configure() and the new interrupt flags. Use logical level pin set operations. Signed-off-by: Peter Bigot <[email protected]>
Switch to gpio_pin_interrupt_configure() and the new interrupt flags. Use logical level pin set operations. Test all standard interrupt configurations including double edge. Signed-off-by: Peter Bigot <[email protected]>
Update with two changes
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Fix to make |
while DTS changes aren't great, its forward progress.
Test that the new port API functions all behave as expected, including physical vs logical level for input and output as well as masked and set-based output operations. Also tests the new pin API functions.
This includes a devicetree binding that can be used to provide target-specific resources for target-specific tests.