-
Notifications
You must be signed in to change notification settings - Fork 26
GSG ZynqPSTest
Collin Dever edited this page Feb 2, 2020
·
8 revisions
This project set implements a minimum Zynq PS block with basic board settings, using templates provided by the SDK to test all peripherals and the DDR3 memory on the CPU side.
Get the Zynq Processing System, particularly the PS Ethernet, verified.
Demo runs at Linux level, and Xilinx SDK GDB is used.
| Board | Project |
|---|---|
| ONetSwitch20 | ons20-gsg-1-procsys |
| ONetSwitch30 | ons30-gsg-1-procsys |
| ONetSwitch45 | ons45-gsg-1-procsys |
- For quick start demo.
| File | ONetSwitch20 | ONetSwitch30 | ONetSwitch45 |
|---|---|---|---|
| boot.bin | Download |
Download |
Download |
| devicetree | Download |
Download |
Download |
| kernel | Download |
Download |
Download |
| rootfs (EXT) | Download |
Download |
Download |
| sw-lib | N/A |
N/A |
N/A |
| sw-app | N/A |
N/A |
N/A |
- For image assembling.
| File | ONetSwitch20 | ONetSwitch30 | ONetSwitch45 |
|---|---|---|---|
| system.bit | Download |
Download |
Download |
| fsbl | Download |
Download |
Download |
| u-boot (FAT) | Download |
Download |
Download |
| u-boot (EXT) | Download |
Download |
Download |
| rootfs (FAT) | Download |
Download |
Download |
- Setup a minimum embedded system with Linux.
- Finish the peripheral test and memory test using SDK templates.
- Generate the FSBL, with optional configuration for the on-board clock generator.
- Verify the Zynq Processing System, particularly the PS Ethernet.
List of the targets in SDK PeripheralTest.
| Test | Target |
|---|---|
| ScuGicSelfTestExample | SCU/GIC |
| XDmaPs_Example_W_Intr | PS DMA |
| EmacPsDmaIntrExample | PS Ethernet |
| QspiSelfTestExample | QSPI |
| DcfgSelfTestExample | Device Config. |
| ScuTimerPolledExample | SCU Timer Polling |
| ScuTimerIntrExample | SCU Timer Interrupt |
| ScuWdtIntrExample | SCU Watchdog Interrupt |
| WdtPsSelfTestExample | PS Watchdog |
List of the targets in SDK MemoryTest.
| Test | Target |
|---|---|
| PS DDR3 | DDR Wr/Rd in 32- 16- and 8-bit |
| PS RAM | RAM Wr/Rd in 32- 16- and 8-bit |
-
VVDCreate a Processing System 7 with board specific configuration, add Processor System Reset Module for resetting logics. -
VVDGenerate the wrapper, implement the design for the FPGA bitfile, then export the design to SDK. -
SDKCreate project using the FSBL template, add the configuration for the clock generator according to the guide, build the FSBL for the .elf file. -
SDKCreate projects using the PeripheralTest and MemoryTest templates.
- Prepare the images in SD/TF card, or download the pre-built ones.
- (For ONS30/45) Check the message "AD9516 configuration done.." or a similar one displayed during the bootloader stage. This means the on-board clock generator is correctly configured.
- Check the log for the PS Ethernet during the startup process or 'dmesg'.
*** example ***
libphy: XEMACPS mii bus: probed
xemacps e000b000.ps7-ethernet: pdev->id -1, baseaddr 0xe000b000, irq 54
- Configure the Ethernet port up and check the status. Try to ping or do other operation on it.
*** example ***
zynq> ifconfig eth0 up
zynq> xemacps e000b000.ps7-ethernet: Set clk to 124999998 Hz
xemacps e000b000.ps7-ethernet: link up (1000/FULL)
- Run the peripheral and memory test in the SDK GDB.
*** example [Peripheral test]***
---Entering main---
Running ScuGicSelfTestExample() for ps7_scugic_0...
ScuGicSelfTestExample PASSED
ScuGic Interrupt Setup PASSED
Running XDmaPs_Example_W_Intr() for ps7_dma_s...
Test round 0
XDmaPs_Example_W_Intr PASSED
Running Interrupt Test for ps7_ethernet_0...
EmacPsDmaIntrExample PASSED
Running QspiSelfTestExample() for ps7_qspi_0...
QspiPsSelfTestExample PASSED
Running DcfgSelfTestExample() for ps7_dev_cfg_0...
DcfgSelfTestExample PASSED
Running ScuTimerPolledExample() for ps7_scutimer_0...
ScuTimerPolledExample PASSED
Running Interrupt Test for ps7_scutimer_0...
ScuTimerIntrExample PASSED
Running Interrupt Test for ps7_scuwdt_0...
ScuWdtIntrExample PASSED
Running WdtPsSelfTestExample() for ps7_wdt_0...
WdtPsSelfTestExample PASSED
---Exiting main---
*** example [Memory test]***
--Starting Memory Test Application--
NOTE: This application runs with D-Cache disabled.As a result, cacheline requests will not be generated
Testing memory region: ps7_ddr_0
Memory Controller: ps7_ddr
Base Address: 0x00100000
Size: 0x3ff00000 bytes
32-bit test: PASSED!
16-bit test: PASSED!
8-bit test: PASSED!
Testing memory region: ps7_ram_1
Memory Controller: ps7_ram
Base Address: 0xffff0000
Size: 0x0000fe00 bytes
32-bit test: PASSED!
16-bit test: PASSED!
8-bit test: PASSED!
--Memory Test Application Complete—