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Phil Zhao edited this page Oct 23, 2015
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###Memory Interface Generator
Memory Interface is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs. Memory Interface generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR3 SDRAM, DDR2 SDRAM, QDRII SRAM, and DDRII SRAM, LP DDR, QDRII+ SRAM, and RLDRAM II.