exu,div: set io.in.valid though the instruction is flushed #469
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
ljwljwljwljw
approved these changes
Jan 22, 2021
sinceforYy
added a commit
to sinceforYy/XiangShan
that referenced
this pull request
Sep 27, 2024
* difftest commit: ca4fce1867b23ebd9af27a4fa8627d2787bbee3a including: * fix(config): allow 8GB memory as default for unknown CPUs (OpenXiangShan#466) * fix(csr): add support non register interrupt pending (OpenXiangShan#465) * fix(csr): fix struct non-reg interrupt pending to order (OpenXiangShan#469) * palladium: Build DPILIB_EMU shared library as separated targets (OpenXiangShan#468) * Difftest: Use file API compatible with with Java8 (OpenXiangShan#467) * Batch: pack Batch param to facilitate migration between DPIC/PCIe (OpenXiangShan#474) * fix(cmo): add cmo inval event * feat(mem): add optional ref func ref_memcpy_init (OpenXiangShan#475) * Merge pull request OpenXiangShan#476 from OpenXiangShan/fix-cmo
sinceforYy
added a commit
to sinceforYy/XiangShan
that referenced
this pull request
Sep 28, 2024
* difftest commit: ca4fce1867b23ebd9af27a4fa8627d2787bbee3a including: * fix(config): allow 8GB memory as default for unknown CPUs (OpenXiangShan#466) * fix(csr): add support non register interrupt pending (OpenXiangShan#465) * fix(csr): fix struct non-reg interrupt pending to order (OpenXiangShan#469) * palladium: Build DPILIB_EMU shared library as separated targets (OpenXiangShan#468) * Difftest: Use file API compatible with with Java8 (OpenXiangShan#467) * Batch: pack Batch param to facilitate migration between DPIC/PCIe (OpenXiangShan#474) * fix(cmo): add cmo inval event * feat(mem): add optional ref func ref_memcpy_init (OpenXiangShan#475) * Merge pull request OpenXiangShan#476 from OpenXiangShan/fix-cmo
sinceforYy
added a commit
to sinceforYy/XiangShan
that referenced
this pull request
Sep 28, 2024
* difftest commit: fbd72a2e718dc37b924bc3e7239d86f8452bd428 including: * fix(config): allow 8GB memory as default for unknown CPUs (OpenXiangShan#466) * fix(csr): add support non register interrupt pending (OpenXiangShan#465) * fix(csr): fix struct non-reg interrupt pending to order (OpenXiangShan#469) * palladium: Build DPILIB_EMU shared library as separated targets (OpenXiangShan#468) * Difftest: Use file API compatible with with Java8 (OpenXiangShan#467) * Batch: pack Batch param to facilitate migration between DPIC/PCIe (OpenXiangShan#474)
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
No description provided.