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Fix compiler crash in memset optimisation #64084

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@cme cme commented Jul 24, 2023

The legacy getDestAlignment member used to get alignment for existing memset intrinsics can use a value of 0 to represent undefined alignment, which will cause the alignment offset calculation to fail as it uses this as the denominator of a modulo operation.

Stefan Pejic and others added 30 commits October 29, 2021 18:53
NOT converts 0 to 0xFFFFFFFF, which is not what we want. Also this
commit removes setge and setuge optimisation which is never actually
selected.
Note that halfword load and store are not being selected at the moment.
Nikola Peric and others added 27 commits May 30, 2023 18:26
- Fix instructions conflicts between NanoMips and other Mips targets
  that caused tests from the MC/Mips group to fail
- Fix several tests
- Fix debug location of SP adjustment instruction that caused
  DebugInfo/Mips/delay-slot.ll test to fail
- Add 'nanomips' feature to llvm-lit config script so that
  tests can be marked as UNSUPPORTED for NanoMips target
- Fix expected output for jumptable.ll and
  mips_generated_funcs.ll tests
- No longer need to mark a test ExtDebugInfo.cpp that
  needs object emitter as UNSUPPORTED
- Delete line left behind by a merge conflict in
  sanitize-coverage-old-pm.c test
This allows the INS instruction to be used to set the
value of one field of the bitfields struct.
* Add LTO section predicting & reporting tool.
The macro nature of these instructions makes them slower than their
individual instruction equivalents, so only use them when optimising
for size.
Merging volatile accesses into lwm/swm can change the order of
accesses and may have other undesirable effects.
Avoid swm/lwm of volatile accesses.
Only use LWM/SWM when optimising for size.
Make sure that we do not use unsupported features by NanoMips
…euristics

Improve MemCopyOpt heuristics to account for combinable stores
Added isBarier flag to definition of BRSC_NM.

Suppressed warnings during build:
 - Reordered NanoMipsJumpTableInfo constructor parameters.
 - Added override identifier to use useIPRA.
Allow OR to INS combine without second register
masking only if maximum possible value given by
KnownBits for the second register can fit
inside SMSize0.
NanoMips: OR combine optimization
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5 participants